From patchwork Thu Apr 6 13:16:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 96963 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp726462qgd; Thu, 6 Apr 2017 06:16:25 -0700 (PDT) X-Received: by 10.99.168.77 with SMTP id i13mr36394495pgp.148.1491484585657; Thu, 06 Apr 2017 06:16:25 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a124si1854401pgc.127.2017.04.06.06.16.25; Thu, 06 Apr 2017 06:16:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934685AbdDFNQY (ORCPT + 6 others); Thu, 6 Apr 2017 09:16:24 -0400 Received: from mail-pg0-f42.google.com ([74.125.83.42]:33989 "EHLO mail-pg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934669AbdDFNQX (ORCPT ); Thu, 6 Apr 2017 09:16:23 -0400 Received: by mail-pg0-f42.google.com with SMTP id 21so36266598pgg.1 for ; Thu, 06 Apr 2017 06:16:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2qzTIGFs3L0mztVJdTVFkEpOYYzGyqGXntBjbBY9I+I=; b=ZFTDxttmwtRn0VV0FyqZiB+VZxa1ySPlixIp5DSBU9rt/FsYbiub065FmnkqA7tLO4 cW1JmRZoYkLedqFGSgduOa59e4WrGD+xs3bEntc+9KSBTQ6Q9rtBorktk1ovHLZMSV7i hviGzodH4YASVZV/nxsXrZVu2Lu8urusMW/b4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2qzTIGFs3L0mztVJdTVFkEpOYYzGyqGXntBjbBY9I+I=; b=Mh1fzCVHsBnKPBM3eakhCCxkoBrv7X5hhjf/6cFHMGRtdFvAyMTyNTS4Xj4v+nJrdn 3S5BAPf8prw2HhVWx88sBzd1vn8lOGLE/uGC4hHy8WbKCOCB5najGyJVAsn2+jlPTehn uG7p1KQG9Kwg59sfWcF49bLBezumgribBjM2eZEmHj2nnSCeUIPS8oPWeVOyEz4bfc4D F+umZO/DRBZCap5GvhPQcO2Xnc8wzDuKESvEr7ikE4k9l/X9xuJi8luTqT8ZwVvzE6MF X4awS3jF5SJsf3aaNGvje+BJXUa1pTbQ1w98jtnRsEj1rneonAJNXYrFX4cKEYIyd4zg deVg== X-Gm-Message-State: AFeK/H0F8l1J/gnOQ0RhNFRJLoD18pjAXiW2RTNOR7AOHaqZkHpONZpaHuvJnesa6cwodPWa X-Received: by 10.84.209.236 with SMTP id y99mr4120740plh.57.1491484582761; Thu, 06 Apr 2017 06:16:22 -0700 (PDT) Received: from localhost.localdomain ([106.51.240.246]) by smtp.gmail.com with ESMTPSA id y6sm4018940pgc.40.2017.04.06.06.16.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 06 Apr 2017 06:16:22 -0700 (PDT) From: Amit Pundir To: gregkh@linuxfoundation.org Cc: stable@vger.kernel.org, james.hogan@imgtec.com, Matt Redfearn , Thomas Gleixner , Paolo Bonzini , Chris Metcalf , Petr Mladek , Paul Burton , Aaron Tomlin , Andrew Morton , linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Ralf Baechle Subject: [PATCH for-4.9 1/7] MIPS: Introduce irq_stack Date: Thu, 6 Apr 2017 18:46:07 +0530 Message-Id: <1491484573-6228-2-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491484573-6228-1-git-send-email-amit.pundir@linaro.org> References: <1491484573-6228-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner Cc: Paolo Bonzini Cc: Chris Metcalf Cc: Petr Mladek Cc: James Hogan Cc: Paul Burton Cc: Aaron Tomlin Cc: Andrew Morton Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14740/ Signed-off-by: Ralf Baechle (cherry picked from commit fe8bd18ffea5327344d4ec2bf11f47951212abd0) Signed-off-by: Amit Pundir --- arch/mips/include/asm/irq.h | 12 ++++++++++++ arch/mips/kernel/asm-offsets.c | 1 + arch/mips/kernel/irq.c | 11 +++++++++++ 3 files changed, 24 insertions(+) -- 2.7.4 diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 6bf10e7..956db6e 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h @@ -17,6 +17,18 @@ #include +#define IRQ_STACK_SIZE THREAD_SIZE + +extern void *irq_stack[NR_CPUS]; + +static inline bool on_irq_stack(int cpu, unsigned long sp) +{ + unsigned long low = (unsigned long)irq_stack[cpu]; + unsigned long high = low + IRQ_STACK_SIZE; + + return (low <= sp && sp <= high); +} + #ifdef CONFIG_I8259 static inline int irq_canonicalize(int irq) { diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index fae2f94..4be2763 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -102,6 +102,7 @@ void output_thread_info_defines(void) OFFSET(TI_REGS, thread_info, regs); DEFINE(_THREAD_SIZE, THREAD_SIZE); DEFINE(_THREAD_MASK, THREAD_MASK); + DEFINE(_IRQ_STACK_SIZE, IRQ_STACK_SIZE); BLANK(); } diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index f25f7ea..2b0a371 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -25,6 +25,8 @@ #include #include +void *irq_stack[NR_CPUS]; + /* * 'what should we do if we get a hw irq event on an illegal vector'. * each architecture has to answer this themselves. @@ -58,6 +60,15 @@ void __init init_IRQ(void) clear_c0_status(ST0_IM); arch_init_irq(); + + for_each_possible_cpu(i) { + int irq_pages = IRQ_STACK_SIZE / PAGE_SIZE; + void *s = (void *)__get_free_pages(GFP_KERNEL, irq_pages); + + irq_stack[i] = s; + pr_debug("CPU%d IRQ stack at 0x%p - 0x%p\n", i, + irq_stack[i], irq_stack[i] + IRQ_STACK_SIZE); + } } #ifdef CONFIG_DEBUG_STACKOVERFLOW