From patchwork Mon Aug 5 17:13:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 170611 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp4552822ile; Mon, 5 Aug 2019 10:14:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqz/1GG5LIznhDIsTrvxS4CeULYTwc51eNNlYQHEAelA7t4HIa30EfI/Y27+VAcfQ3dSENgQ X-Received: by 2002:a17:902:740a:: with SMTP id g10mr146498485pll.82.1565025243039; Mon, 05 Aug 2019 10:14:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565025243; cv=none; d=google.com; s=arc-20160816; b=lmcBYQTLfJFazWoDt0i5yvbZ2ynkCeBG1u5t4y1l2AmVQbgkWcR5LgzHPsne2IrL40 ZV6BC11w9U+Hty+9SoR16t2XMEKoeAhYffpRoArxldYbFyf53fnRaxOlQK9gFU55P/5D wbMR5SXOqk9jfJkkZne7ytRtMAJsWW/NjfA3ohJHPK0jjnDbjIm0PGa7FZasr+fTpgYE iPF5YmaT5H53Z54AVurf/K0ZAGZG+Tsi0qa3HDpFwHfPcuGuUXb/tdT24XBP9l0hU4iS cPHMSd8APjnvmz2ejsIpd1CHVlQsFEywFPxALrTN4uRzNUi5P2OflI8dkQ8z18tx+w9h vhoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=Ch0gaZeDjKQVQkkyoqoAt2fSuvoXYCwCq4RisV43598=; b=cWpKc7MLOqhVka0AAvrd4Ztsa8rOM4iLXzoNIWWSQUCBEZn8jqtzbHlokGEy92JtTb oebHwQkxFnLej4ftvg7TUa01W6pVUK0jPumgseITrG2562tKsVoVTUDigXkGMg5P5J5u KhciBHjk4P1kIXRJHRZgy0GEvXzKKW37ATf7MIjpd2Lt4SdYYURPm9HRyATEaTrh5i+m +SlkUhLII2o/aLKBwBDSIY+p+0JYJEXvYerrHx/xoWBX6WVkxQ8uzBlqGiajXDP/tjoH 4u1gCeDvT8yC0u77gY5Y22FmHcpfpHZGBHFBdlgtpll4drjTAsD3UNB3K9uDHk9FQfhW ICfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="avFLr/MK"; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a64si46554505pfb.60.2019.08.05.10.14.02; Mon, 05 Aug 2019 10:14:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="avFLr/MK"; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728871AbfHEROC (ORCPT + 14 others); Mon, 5 Aug 2019 13:14:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:48752 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727460AbfHEROC (ORCPT ); Mon, 5 Aug 2019 13:14:02 -0400 Received: from localhost.localdomain (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AB1B9216F4; Mon, 5 Aug 2019 17:14:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1565025241; bh=TYY/kl0zKTmt6jLZ/RbbsTk5JFN8UrrdbVZnQbXwW/0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=avFLr/MKwkBfftoKFk++r4UM8EUYFQbokBd80eEa5I9DaVvDJRWudtlrSBL0YdeVA iYGTmTzG9xR99L2MJt16WCqICblqCOYEoYjNb/FVs6hCpfROpy/PlHdJyR5p6KGxlA qkYbMm2qxbVm65DiVvzs3jPIezoWC/rJHz5eF0MA= From: Will Deacon To: gregkh@linuxfoundation.org Cc: stable@vger.kernel.org, Will Deacon , Shanker Donthineni , Will Deacon Subject: [PATCH 1/2] arm64: cpufeature: Fix CTR_EL0 field definitions Date: Mon, 5 Aug 2019 18:13:54 +0100 Message-Id: <20190805171355.19308-2-will@kernel.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190805171355.19308-1-will@kernel.org> References: <20190805171355.19308-1-will@kernel.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Will Deacon commit be68a8aaf925aaf35574260bf820bb09d2f9e07f upstream. Our field definitions for CTR_EL0 suffer from a number of problems: - The IDC and DIC fields are missing, which causes us to enable CTR trapping on CPUs with either of these returning non-zero values. - The ERG is FTR_LOWER_SAFE, whereas it should be treated like CWG as FTR_HIGHER_SAFE so that applications can use it to avoid false sharing. - [nit] A RES1 field is described as "RAO" This patch updates the CTR_EL0 field definitions to fix these issues. Cc: # 4.9.y only Cc: Shanker Donthineni Signed-off-by: Will Deacon Signed-off-by: Will Deacon --- arch/arm64/kernel/cpufeature.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.11.0 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index a3ab7dfad50a..e2ac72b7e89c 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -148,10 +148,12 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr2[] = { }; static const struct arm64_ftr_bits ftr_ctr[] = { - ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RAO */ - ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 28, 3, 0), + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RES1 */ + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 30, 1, 0), + ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 29, 1, 1), /* DIC */ + ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 28, 1, 1), /* IDC */ ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0), /* CWG */ - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0), /* ERG */ + ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 20, 4, 0), /* ERG */ ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1), /* * Linux can handle differing I-cache policies. Userspace JITs will