From patchwork Thu Oct 10 08:36:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175724 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1983677ill; Thu, 10 Oct 2019 01:48:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqzYovd3cXh7ND5q0r3JwuBcUmCFHtUGCJIXLmm/wMPBG9O03Q+TwU4xD4Y7WnJ0rc4R7OZ6 X-Received: by 2002:a17:906:688:: with SMTP id u8mr7150975ejb.208.1570697326983; Thu, 10 Oct 2019 01:48:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697326; cv=none; d=google.com; s=arc-20160816; b=jfnrFemvt8OVG7EJk+w4JuR06NOvu0RRnpzmyfVYamDWB6LqEvSps+5P/sj4biXcON QkIINbxMdVwvtLIkX1dscdwuwSvJqGmSTm5L6WbxyNPI6u5z76f4zNiXBlWRGIJ+JDVx 46e+pApoqleXhJAYZhCnxzLMYTjTMF6kQg9uCAvv9MHNBAjwBhGrI11t25j86au3YRWE k1gY5PcQPcYBu934dWUPGbd4ROWQFRe733C7oKqpOZgUrKWmyUbRBRv9zMrf4xW+xwin TeMnrYtZXBBx0frShrEibb98RxcWo35+RoQ65GoayBcZOT+M05uzzQQBhxU1XuThXntd nGqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cIHPNYi0Jk/gwDW5W5ck3Mz2tlCIgfm7mqI7RGEOd/o=; b=VMSDtRvDTAcpPacrbaqpaSXIjhk+5aDMhMuHvRb7zaH0BWxWHGjPgmK7A32ACry4gO slA0XwWE5w2Q85FROqEnKf66B6ed6SXWjWGrYisNqpydlslyq6AmgqfBD6rNRDaWR6cR 7AVhUlMY83QJSqUEyl+XT+DdRtuzgKICj6z8KYIXVAG5vuOqNOAed7cz2gpsGpC8yh9Q YBxMPxMun+BEDIGBL8eqUvtHT6R3vbrHZ0ZCkIZid8AV4/De1Zv56imT/qnExV5LedyB dSgUEja8JoP1vIZ/bg35sdnoQm71LnHqmMSSXZYrkEPbYRLqebAiySYhkBMEv4RwKoY/ qT2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Qmy6nPyi; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z9si3135090edz.77.2019.10.10.01.48.46; Thu, 10 Oct 2019 01:48:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Qmy6nPyi; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389691AbfJJIso (ORCPT + 13 others); Thu, 10 Oct 2019 04:48:44 -0400 Received: from mail.kernel.org ([198.145.29.99]:54916 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389680AbfJJIsk (ORCPT ); Thu, 10 Oct 2019 04:48:40 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1006D2064A; Thu, 10 Oct 2019 08:48:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697318; bh=FmzEMjZSelSMOSQZgp2rUdO+aFnsDCvFmd1Q5Ugd5d4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qmy6nPyi3kVlrkk2x0+Jdm8yqPjfJeBHPyLwqoBNtjO4FT/wrtk+4nbPU9dLRyHeo ZrYgtCPDGh749AZN2tCAUNougzAlFC+t5j3ibFSS7dDKFSK15ZV7gkF+nPkuFUO99g ZBP/6MFO0OPYoVwUJL1cGi0nGO/fuHZ3xbmf7ul0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jeremy Linton , Andre Przywara , Catalin Marinas , Stefan Wahren , Will Deacon , Ard Biesheuvel Subject: [PATCH 4.19 099/114] arm64: Always enable spectre-v2 vulnerability detection Date: Thu, 10 Oct 2019 10:36:46 +0200 Message-Id: <20191010083613.410310738@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jeremy Linton [ Upstream commit 8c1e3d2bb44cbb998cb28ff9a18f105fee7f1eb3 ] Ensure we are always able to detect whether or not the CPU is affected by Spectre-v2, so that we can later advertise this to userspace. Signed-off-by: Jeremy Linton Reviewed-by: Andre Przywara Reviewed-by: Catalin Marinas Tested-by: Stefan Wahren Signed-off-by: Will Deacon Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/cpu_errata.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -87,7 +87,6 @@ cpu_enable_trap_ctr_access(const struct atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1); -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR #include #include @@ -225,11 +224,11 @@ static int detect_harden_bp_fw(void) ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)) cb = qcom_link_stack_sanitization; - install_bp_hardening_cb(cb, smccc_start, smccc_end); + if (IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) + install_bp_hardening_cb(cb, smccc_start, smccc_end); return 1; } -#endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ DEFINE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required); @@ -513,7 +512,6 @@ multi_entry_cap_cpu_enable(const struct caps->cpu_enable(caps); } -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR /* * List of CPUs that do not need any Spectre-v2 mitigation at all. */ @@ -545,6 +543,12 @@ check_branch_predictor(const struct arm6 if (!need_wa) return false; + if (!IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) { + pr_warn_once("spectrev2 mitigation disabled by kernel configuration\n"); + __hardenbp_enab = false; + return false; + } + /* forced off */ if (__nospectre_v2) { pr_info_once("spectrev2 mitigation disabled by command line option\n"); @@ -556,7 +560,6 @@ check_branch_predictor(const struct arm6 return (need_wa > 0); } -#endif #ifdef CONFIG_HARDEN_EL2_VECTORS @@ -715,13 +718,11 @@ const struct arm64_cpu_capabilities arm6 ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), }, #endif -#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .matches = check_branch_predictor, }, -#endif #ifdef CONFIG_HARDEN_EL2_VECTORS { .desc = "EL2 vector hardening",