From patchwork Fri Nov 8 18:49:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 178933 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp3124236ilf; Fri, 8 Nov 2019 10:54:36 -0800 (PST) X-Google-Smtp-Source: APXvYqyEzWMEoibE7h1gf8TJCJllrxsvxmdvL72GhHnP7Qmkbn3sWh58WmC9jcmgyKTfmXH2M6j6 X-Received: by 2002:a05:6402:1397:: with SMTP id b23mr12138498edv.196.1573239276471; Fri, 08 Nov 2019 10:54:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573239276; cv=none; d=google.com; s=arc-20160816; b=rRuoozEtr1gViocMecR3jM79bRYqrMtXISvRExN1XWsrzVBU9l9CaXKqpVKdFzCTfy PpblqLQq8I+5nR+PoPEEKx47u3W1q0D7b5jvkArzrxILQOomaKkkVoAtqTKY2NZ9E4UM mH95cv8H0abeuPKXQo9k3nn5iloFE27Xx4Qq7B/EFd0UDPF0PdNj1mSWJ506wXhhDTpB 90eGyUOrY++3TugxIX2rodVBHTcsJSivPW4qDJlWw72RpFL+KUAoZfc0W926P+XjRWxS MkxEKYb4fyOpkoRa1U65agFaI8uwYg4TUZmRbO/gDheFb4m2HEmNwyLOwavnYwGqXzm7 q1aA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uQ6vxliBnuqFpkNqOzpjHq9RTmEba8Ys/GT63NqsnoA=; b=tWVIbwgSmUX1s8TC/SXyEkY3A6JVO7pbYAAoS6GTJStmR5+AdvXhPgEdVKAoJi9bJx E7XaPEpQzEQhGWfoi70iSGMoUBtpVLcgMicYh3+WR8abvg3PKad1JgAxqFNUnYwTDLYp CCLRgI9AjwQQXkvEcuBgAQYbuHAKefO0g1y0vmr+JQpO5R3SfUCy0imYF8jLHQM8AgWM TYV2SCFGJdswcD1+KCBxkJ4AmXTyfSM9dx5byCUNXfLHhDBf3/9Fcma2/Crjb79nZ5Ni RPQLcQjiAzIS3RFmQEjV+/idwJOpnXy+uyhkt+PqCy3tsW504hIeczmWT04pUhkBwdUu 2o7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=kqDSjdTo; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o1si4166483eje.298.2019.11.08.10.54.36; Fri, 08 Nov 2019 10:54:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=kqDSjdTo; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732947AbfKHSy2 (ORCPT + 14 others); Fri, 8 Nov 2019 13:54:28 -0500 Received: from mail.kernel.org ([198.145.29.99]:51406 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727559AbfKHSyY (ORCPT ); Fri, 8 Nov 2019 13:54:24 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 05C9521D7F; Fri, 8 Nov 2019 18:54:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573239263; bh=wuf/8sbxeqrQDFNdCPZk/wONDsGgggqmt0P9phCsHPw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kqDSjdToNN75Z3F7RHqMFbpj8vzvJn04Rtk5RFbvtL7OkfKaUjX7znVyMIHI2TRz+ jeqSlXFaHV6bZCIL77GdlC3/9ngkU2qJoEw9UXkNtoLvctIMtLhVVAZRUDFzKoJMMi lP7k4f8lFrIr83s9em7RHdCqhgARc6yAebEiZlRI= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Greg Kroah-Hartman , Julien Grall , Marc Zyngier , Will Deacon , Sasha Levin , Ard Biesheuvel Subject: [PATCH 4.4 38/75] arm/arm64: smccc-1.1: Make return values unsigned long Date: Fri, 8 Nov 2019 19:49:55 +0100 Message-Id: <20191108174746.463484664@linuxfoundation.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191108174708.135680837@linuxfoundation.org> References: <20191108174708.135680837@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier [ Upstream commit 1d8f574708a3fb6f18c85486d0c5217df893c0cf ] An unfortunate consequence of having a strong typing for the input values to the SMC call is that it also affects the type of the return values, limiting r0 to 32 bits and r{1,2,3} to whatever was passed as an input. Let's turn everything into "unsigned long", which satisfies the requirements of both architectures, and allows for the full range of return values. Reported-by: Julien Grall Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- include/linux/arm-smccc.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -167,31 +167,31 @@ asmlinkage void arm_smccc_hvc(unsigned l #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ + register unsigned long r0 asm("r0") = (u32)a0; \ register unsigned long r1 asm("r1"); \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ - register typeof(a3) r3 asm("r3") = a3 + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ + register unsigned long r3 asm("r3") = a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ __declare_arg_3(a0, a1, a2, a3, res); \