From patchwork Thu Jan 2 22:06:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 234531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE359C3276C for ; Thu, 2 Jan 2020 22:54:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A9BD4222C3 for ; Thu, 2 Jan 2020 22:54:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1578005660; bh=ep9gLDaU4fQuW4s5VjCKlb/xQtq90DV88lZZIOURVh0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=unDMJojSVjHNs5do4dDljfMvaaLhD/EeIG07sLyeAdBTvz35P7x9h2Zogl5ViV4a4 k1iAN0AxEqb7S5pea3gbt958sO334XOsjU07thxXBKc5x2e+Bcx8ooT7hYLOQ/FET4 cxBq1I427sGsev3CIkEQMAeXzawsBZ13ygUfLnJk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728118AbgABWUp (ORCPT ); Thu, 2 Jan 2020 17:20:45 -0500 Received: from mail.kernel.org ([198.145.29.99]:38776 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728864AbgABWUo (ORCPT ); Thu, 2 Jan 2020 17:20:44 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D90F624650; Thu, 2 Jan 2020 22:20:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1578003644; bh=ep9gLDaU4fQuW4s5VjCKlb/xQtq90DV88lZZIOURVh0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uTSPwpC6T12g8zgK1Qtb098eeyviwPbE0lIx4R6YeBt+4JpoJ9g9UHtffclnfg2ZD cWCU5pfVUMI+ZsluNq8hsdV7uCab4NE9MdMn0qihjsaJvQaIvh9kQjNpzz8+IX5lJx uaZ0R/kB7j0JodoogVyla4u5sg0mwQ3zp2VMC0a4= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Doug Berger , Florian Fainelli , Russell King , Sasha Levin Subject: [PATCH 4.19 047/114] ARM: 8937/1: spectre-v2: remove Brahma-B53 from hardening Date: Thu, 2 Jan 2020 23:06:59 +0100 Message-Id: <20200102220033.831569340@linuxfoundation.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200102220029.183913184@linuxfoundation.org> References: <20200102220029.183913184@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Doug Berger [ Upstream commit 4ae5061a19b550dfe25397843427ed2ebab16b16 ] When the default processor handling was added to the function cpu_v7_spectre_init() it only excluded other ARM implemented processor cores. The Broadcom Brahma B53 core is not implemented by ARM so it ended up falling through into the set of processors that attempt to use the ARM_SMCCC_ARCH_WORKAROUND_1 service to harden the branch predictor. Since this workaround is not necessary for the Brahma-B53 this commit explicitly checks for it and prevents it from applying a branch predictor hardening workaround. Fixes: 10115105cb3a ("ARM: spectre-v2: add firmware based hardening") Signed-off-by: Doug Berger Signed-off-by: Florian Fainelli Signed-off-by: Russell King Signed-off-by: Sasha Levin --- arch/arm/mm/proc-v7-bugs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c index 9a07916af8dd..a6554fdb56c5 100644 --- a/arch/arm/mm/proc-v7-bugs.c +++ b/arch/arm/mm/proc-v7-bugs.c @@ -65,6 +65,9 @@ static void cpu_v7_spectre_init(void) break; #ifdef CONFIG_ARM_PSCI + case ARM_CPU_PART_BRAHMA_B53: + /* Requires no workaround */ + break; default: /* Other ARM CPUs require no workaround */ if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)