From patchwork Tue Feb 18 19:54:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 231089 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59985C34026 for ; Tue, 18 Feb 2020 20:08:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 288802067D for ; Tue, 18 Feb 2020 20:08:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582056494; bh=gXlqe2ZJceVqgHl8SGNURvfC+AiCU2Ij8n9ZA2sMH2Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=I7v7xZYP/ykhH5R0HXAYphnXdy07+vWWIgfseM2Qy6mENEMOBcCihKF6LW724+/Aq BxMJudZEjQvn1TlDqqD9ldzFgpZU7xgANK4ycHOLIymdUZs5VHQqbcL9AXkJi5KYWZ ASRYoBu6Q2IXaIDGokVVNHeMrAsc2D5iPG2Sn7sY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728174AbgBRT6X (ORCPT ); Tue, 18 Feb 2020 14:58:23 -0500 Received: from mail.kernel.org ([198.145.29.99]:35994 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728172AbgBRT6X (ORCPT ); Tue, 18 Feb 2020 14:58:23 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8DEDF20659; Tue, 18 Feb 2020 19:58:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582055902; bh=gXlqe2ZJceVqgHl8SGNURvfC+AiCU2Ij8n9ZA2sMH2Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=2v3n3+xh+ipNTB3YVRB0WslaaMrjJ8h1bJZdS/vD1b/ha/MCHH4LWpvQfDgd/meT5 8RMQuuB/kx2fJPK+OJBtQjlj5Iwj/lRzF2ZpfK3SEQwVLvLi3D7da9kWP8uthWO7fd F9j2Xx44sL+Y5f+7fY1TKX19jBfsxyhYbEoncAIQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Catalin Marinas , Srinivas Ramana , Marc Zyngier , Will Deacon Subject: [PATCH 5.4 25/66] arm64: ssbs: Fix context-switch when SSBS is present on all CPUs Date: Tue, 18 Feb 2020 20:54:52 +0100 Message-Id: <20200218190430.404051028@linuxfoundation.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200218190428.035153861@linuxfoundation.org> References: <20200218190428.035153861@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Will Deacon commit fca3d33d8ad61eb53eca3ee4cac476d1e31b9008 upstream. When all CPUs in the system implement the SSBS extension, the SSBS field in PSTATE is the definitive indication of the mitigation state. Further, when the CPUs implement the SSBS manipulation instructions (advertised to userspace via an HWCAP), EL0 can toggle the SSBS field directly and so we cannot rely on any shadow state such as TIF_SSBD at all. Avoid forcing the SSBS field in context-switch on such a system, and simply rely on the PSTATE register instead. Cc: Cc: Catalin Marinas Cc: Srinivas Ramana Fixes: cbdf8a189a66 ("arm64: Force SSBS on context switch") Reviewed-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/process.c | 7 +++++++ 1 file changed, 7 insertions(+) --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -466,6 +466,13 @@ static void ssbs_thread_switch(struct ta if (unlikely(next->flags & PF_KTHREAD)) return; + /* + * If all CPUs implement the SSBS extension, then we just need to + * context-switch the PSTATE field. + */ + if (cpu_have_feature(cpu_feature(SSBS))) + return; + /* If the mitigation is enabled, then we leave SSBS clear. */ if ((arm64_get_ssbd_state() == ARM64_SSBD_FORCE_ENABLE) || test_tsk_thread_flag(next, TIF_SSBD))