From patchwork Tue Mar 24 13:10:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 228867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 401E4C41621 for ; Tue, 24 Mar 2020 13:18:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 14D5E20936 for ; Tue, 24 Mar 2020 13:18:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585055908; bh=p+doGnRzaKO0ei7HENSP5rHdtLQfvDeepgfpWPTJ9Ow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=y+hLj1L+dc2S6YrbRErWGQKcFiEzlvfmp/JoSOSi0A9aefrVTh41+bb6u0urPzROi PEmN4LiaPo7t++hg6ytUqjOkZl5NLnqm4jGbbpCEu9Fu5Hqq8d/9DAtAs8ldbgRwPq K7PIcqdoCtnoUAJWtyjVqsr2veVHTpsqz5KFHLjo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728349AbgCXNSX (ORCPT ); Tue, 24 Mar 2020 09:18:23 -0400 Received: from mail.kernel.org ([198.145.29.99]:38494 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728713AbgCXNSV (ORCPT ); Tue, 24 Mar 2020 09:18:21 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 88B9B206F6; Tue, 24 Mar 2020 13:18:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585055901; bh=p+doGnRzaKO0ei7HENSP5rHdtLQfvDeepgfpWPTJ9Ow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sBJtmh8acoFk2ZEj1YpQkb+adJzKd+3j0QkvOaevXxCjhCidaqF4aT4LmYuMQKmrT IUKAtuGwSbUfYKd511/3UEny4oPIpUYLi1zV4w5qHNS7xoIc3Dh1kKg9SQ6MDod69c se4f60HhxFk0DotoThpTQNPgEqxYHRmm4CkMbo5E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Eugen Hristev , Stable@vger.kernel.org, Jonathan Cameron Subject: [PATCH 5.4 062/102] iio: adc: at91-sama5d2_adc: fix differential channels in triggered mode Date: Tue, 24 Mar 2020 14:10:54 +0100 Message-Id: <20200324130812.941317948@linuxfoundation.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200324130806.544601211@linuxfoundation.org> References: <20200324130806.544601211@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Eugen Hristev commit a500f3bd787f8224341e44b238f318c407b10897 upstream. The differential channels require writing the channel offset register (COR). Otherwise they do not work in differential mode. The configuration of COR is missing in triggered mode. Fixes: 5e1a1da0f8c9 ("iio: adc: at91-sama5d2_adc: add hw trigger and buffer support") Signed-off-by: Eugen Hristev Cc: Signed-off-by: Jonathan Cameron Signed-off-by: Greg Kroah-Hartman --- drivers/iio/adc/at91-sama5d2_adc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -723,6 +723,7 @@ static int at91_adc_configure_trigger(st for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) { struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit); + u32 cor; if (!chan) continue; @@ -732,6 +733,20 @@ static int at91_adc_configure_trigger(st continue; if (state) { + cor = at91_adc_readl(st, AT91_SAMA5D2_COR); + + if (chan->differential) + cor |= (BIT(chan->channel) | + BIT(chan->channel2)) << + AT91_SAMA5D2_COR_DIFF_OFFSET; + else + cor &= ~(BIT(chan->channel) << + AT91_SAMA5D2_COR_DIFF_OFFSET); + + at91_adc_writel(st, AT91_SAMA5D2_COR, cor); + } + + if (state) { at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); /* enable irq only if not using DMA */