From patchwork Thu Apr 16 13:25:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 227864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B466C352BE for ; Thu, 16 Apr 2020 13:42:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 317EE218AC for ; Thu, 16 Apr 2020 13:42:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587044543; bh=540FkIF1U3MT9lP7hXMO8AP9c7LsRRoUqes2KkktgT8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ry3gnY+8sEsiMq9plSxD2O7+J9CqCLad8irTnIG0YlBmp7ySF5wECDhNvxAeWPXN+ g1or/9xyDgMlXU0J9mxMS9mLuux9weNrcbTVwRl9Itv5xLSItsusgoInw1AUYZHtnT nb07Lik8+tmHAFver1yB4Cld/0OCcfj3LSRpYkEM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405133AbgDPNmV (ORCPT ); Thu, 16 Apr 2020 09:42:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:55232 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726610AbgDPNmS (ORCPT ); Thu, 16 Apr 2020 09:42:18 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 101AB2222C; Thu, 16 Apr 2020 13:42:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587044537; bh=540FkIF1U3MT9lP7hXMO8AP9c7LsRRoUqes2KkktgT8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G4bTYmF4VAIj9EWjd14Sa9VLRCHBo5t8imjM3rPiWh8SxCBa9/WN5Nwpkxm6hH0k/ LNQo31BsBUIUtuOgTCuKBm+4P/xSJIGW9qyP6Dz7Vpl3NXAkebgcQBb944OLYRFKTc 3CV9oKddPEzG1MawbZrfV8bbBtrhnIFfpgzjn49E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Prike Liang , Mengbing Wang , Huang Rui , Alex Deucher , Sasha Levin Subject: [PATCH 5.5 249/257] drm/amdgpu: fix gfx hang during suspend with video playback (v2) Date: Thu, 16 Apr 2020 15:25:00 +0200 Message-Id: <20200416131356.749679456@linuxfoundation.org> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20200416131325.891903893@linuxfoundation.org> References: <20200416131325.891903893@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Prike Liang [ Upstream commit 487eca11a321ef33bcf4ca5adb3c0c4954db1b58 ] The system will be hang up during S3 suspend because of SMU is pending for GC not respose the register CP_HQD_ACTIVE access request.This issue root cause of accessing the GC register under enter GFX CGGPG and can be fixed by disable GFX CGPG before perform suspend. v2: Use disable the GFX CGPG instead of RLC safe mode guard. Signed-off-by: Prike Liang Tested-by: Mengbing Wang Reviewed-by: Huang Rui Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 9a8a1c6ca3210..7d340c9ec3037 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2259,8 +2259,6 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) { int i, r; - amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); - amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); for (i = adev->num_ip_blocks - 1; i >= 0; i--) { if (!adev->ip_blocks[i].status.valid) @@ -3242,6 +3240,9 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon) } } + amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); + amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); + amdgpu_amdkfd_suspend(adev); amdgpu_ras_suspend(adev);