From patchwork Fri Jun 19 14:31:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 224193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85CE4C433E0 for ; Fri, 19 Jun 2020 14:57:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5755F21852 for ; Fri, 19 Jun 2020 14:57:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592578638; bh=Vj40IoPOE65MreJGQsliioZV652Fcfw2u+aDqXYJhpY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=xdppH4Xvh9Vx4mMoqv0+Tc9l7QJ8RgDtaYQa+h/caQ7aM/WBp67Rd4fecf8kCRoNC IVB6crjNX+YNLHm3YQkxtitIXpgDxzk61hJ8aND8YJBCK0EnJUNCuKFpgiAezVUaDc ey1qkC7PQxnQ+je1cJG/N1caoGP3EIUmOBv8lFXQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390208AbgFSO5Q (ORCPT ); Fri, 19 Jun 2020 10:57:16 -0400 Received: from mail.kernel.org ([198.145.29.99]:52546 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390205AbgFSO5P (ORCPT ); Fri, 19 Jun 2020 10:57:15 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1426B21852; Fri, 19 Jun 2020 14:57:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592578635; bh=Vj40IoPOE65MreJGQsliioZV652Fcfw2u+aDqXYJhpY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qdpfGJnzFwCo48ZePT1WYGnXu3zUuvFGYc/w/IoL/RPDKKfa2lOvi8pF7gkm289+8 dbp9UdFNHK/4IJkVM6qbNCGPyEebwFsGPFAiTlhlp638H6gW2QjIZylBnzRoyTbYYX iqU83C7e79Rq8CgTC93GHx6HUg/vqAOpMiHyjnZ0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Evan Green , Shobhit Srivastava , Andy Shevchenko , Mark Brown , Sasha Levin Subject: [PATCH 4.19 098/267] spi: pxa2xx: Apply CS clk quirk to BXT Date: Fri, 19 Jun 2020 16:31:23 +0200 Message-Id: <20200619141653.563074235@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200619141648.840376470@linuxfoundation.org> References: <20200619141648.840376470@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Evan Green [ Upstream commit 6eefaee4f2d366a389da0eb95e524ba82bf358c4 ] With a couple allies at Intel, and much badgering, I got confirmation from Intel that at least BXT suffers from the same SPI chip-select issue as Cannonlake (and beyond). The issue being that after going through runtime suspend/resume, toggling the chip-select line without also sending data does nothing. Add the quirk to BXT to briefly toggle dynamic clock gating off and on, forcing the fabric to wake up enough to notice the CS register change. Signed-off-by: Evan Green Cc: Shobhit Srivastava Cc: Andy Shevchenko Link: https://lore.kernel.org/r/20200427163238.1.Ib1faaabe236e37ea73be9b8dcc6aa034cb3c8804@changeid Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-pxa2xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 2525fd9c8aa4..eafd0c2135a1 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -156,6 +156,7 @@ static const struct lpss_config lpss_platforms[] = { .tx_threshold_hi = 48, .cs_sel_shift = 8, .cs_sel_mask = 3 << 8, + .cs_clk_stays_gated = true, }, { /* LPSS_CNL_SSP */ .offset = 0x200,