From patchwork Tue Sep 15 14:11:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 309640 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64D8EC43461 for ; Tue, 15 Sep 2020 23:44:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 28FF621D7F for ; Tue, 15 Sep 2020 23:44:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600213499; bh=+5jQ+2T3TUQBjDfHf2mTIIbQIYKYejpOQqv0/qhBiI8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ciD4KPYEbnxl+QZJiLFkLf1qq6eUr4LkFpQG18/XSsSRSJ3pGmGEoNmSoqwwwbN1Z ACtVy/+8Vd3v/RZiS0n1/JD2LyhKknbWyJRqqC9krJs7Th6/1d9T8GxsEMUdCRWd8F GDO+JYeS/7PTydl7zYX+HPf8Vk0wBQTZkUJ6vbqU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727192AbgIOXo4 (ORCPT ); Tue, 15 Sep 2020 19:44:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:44146 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726746AbgIOOdX (ORCPT ); Tue, 15 Sep 2020 10:33:23 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 81D7923BE5; Tue, 15 Sep 2020 14:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600179890; bh=+5jQ+2T3TUQBjDfHf2mTIIbQIYKYejpOQqv0/qhBiI8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bRVin4YuLKIg8TN6pxQWW+dKzCxD0u7tRMQ9bPECdOy6mQYaPGPc3r7PmaWwe0UFJ x/OlfZ15se0ICc4AuQI4h2TshijKYfokR5NYHZN8uZmmiTksaUZtosuRxAHOMwNZwS 3OAH5xdn5hB7MXAbaUbMGSTF4lQeYqG/AGRVLkDM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Dinh Nguyen , Sasha Levin Subject: [PATCH 5.8 007/177] ARM: dts: socfpga: fix register entry for timer3 on Arria10 Date: Tue, 15 Sep 2020 16:11:18 +0200 Message-Id: <20200915140653.981031950@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200915140653.610388773@linuxfoundation.org> References: <20200915140653.610388773@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Dinh Nguyen [ Upstream commit 0ff5a4812be4ebd4782bbb555d369636eea164f7 ] Fixes the register address for the timer3 entry on Arria10. Fixes: 475dc86d08de4 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC") Signed-off-by: Dinh Nguyen Signed-off-by: Sasha Levin --- arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 8f614c4b0e3eb..9c71472c237bd 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -819,7 +819,7 @@ timer3: timer3@ffd00100 { compatible = "snps,dw-apb-timer"; interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; - reg = <0xffd01000 0x100>; + reg = <0xffd00100 0x100>; clocks = <&l4_sys_free_clk>; clock-names = "timer"; resets = <&rst L4SYSTIMER1_RESET>;