diff mbox series

[08/15] drm/amd/display: Increase timeout for DP Disable

Message ID 20200916193635.5169-9-qingqing.zhuo@amd.com
State New
Headers show
Series [01/15] drm/amd/display: Fix incorrect backlight register offset for DCN | expand

Commit Message

Qingqing Zhuo Sept. 16, 2020, 7:36 p.m. UTC 
From: Wesley Chalmers <Wesley.Chalmers@amd.com>

[WHY]
When disabling DP video, the current REG_WAIT timeout
of 50ms is too low for certain cases with very high
VSYNC intervals.

[HOW]
Increase the timeout to 102ms, so that
refresh rates as low as 10Hz can be handled properly.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Cc: <stable@vger.kernel.org>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Sasha Levin Sept. 21, 2020, 12:54 p.m. UTC | #1 
Hi

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.8.10, v5.4.66, v4.19.146, v4.14.198, v4.9.236, v4.4.236.

v5.8.10: Build OK!
v5.4.66: Build OK!
v4.19.146: Failed to apply! Possible dependencies:
    3af91bb15093 ("drm/amd/display: Increase DP blank timeout from 30 ms to 50 ms")

v4.14.198: Failed to apply! Possible dependencies:
    0c41891c81c0 ("drm/amd/display: Refactor stream encoder for HW review")
    1b0c0f9dc5ca ("drm/amdgpu: move userptr BOs to CPU domain during CS v2")
    3fe89771cb0a ("drm/amdgpu: stop reserving the BO in the MMU callback v3")
    4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
    587cdfe9463e ("drm/amd/display: Rename trasnform to dpp for dcn's")
    5aff86c1b325 ("drm/amd/display: Implement input gamma LUT")
    60de1c1740f3 ("drm/amdgpu: use a rw_semaphore for MMU notifiers")
    70ccab604049 ("drm/amdgpu/display: Add core dc support for DCN")
    9a18999640fa ("drm/amdgpu: move MMU notifier related defines to amdgpu_mn.h")
    9a70eba7f2c6 ("drm/amd/display: consolidate dce8-11.2 display clock code")
    9cca0b8e5df0 ("drm/amdgpu: move amdgpu_cs_sysvm_access_required into find_mapping")
    a216ab09955d ("drm/amdgpu: fix userptr put_page handling")
    b1a4eb992c17 ("drm/amd/display: enable diags compilation")
    b51adc77e220 ("drm/amd/display: Only blank DCN when we have set_blank implementation")
    b72cf4fca2bb ("drm/amdgpu: move taking mmap_sem into get_user_pages v2")
    ca666a3c298f ("drm/amdgpu: stop using BO status for user pages")

v4.9.236: Failed to apply! Possible dependencies:
    0c41891c81c0 ("drm/amd/display: Refactor stream encoder for HW review")
    1cec20f0ea0e ("dma-buf: Restart reservation_object_wait_timeout_rcu() after writes")
    248a1d6f1ac4 ("drm/amd: fix include notation and remove -Iinclude/drm flag")
    4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
    587cdfe9463e ("drm/amd/display: Rename trasnform to dpp for dcn's")
    5aff86c1b325 ("drm/amd/display: Implement input gamma LUT")
    70ccab604049 ("drm/amdgpu/display: Add core dc support for DCN")
    78010cd9736e ("dma-buf/fence: add an lockdep_assert_held()")
    9a70eba7f2c6 ("drm/amd/display: consolidate dce8-11.2 display clock code")
    b1a4eb992c17 ("drm/amd/display: enable diags compilation")
    b51adc77e220 ("drm/amd/display: Only blank DCN when we have set_blank implementation")
    f54d1867005c ("dma-buf: Rename struct fence to dma_fence")
    fedf54132d24 ("dma-buf: Restart reservation_object_get_fences_rcu() after writes")

v4.4.236: Failed to apply! Possible dependencies:
    0c41891c81c0 ("drm/amd/display: Refactor stream encoder for HW review")
    0f477c6dea70 ("staging/android/sync: add sync_fence_create_dma")
    1f7371b2a5fa ("drm/amd/powerplay: add basic powerplay framework")
    248a1d6f1ac4 ("drm/amd: fix include notation and remove -Iinclude/drm flag")
    288912cb95d1 ("drm/amdgpu: use $(src) in Makefile (v2)")
    375fb53ec1be ("staging: android: replace explicit NULL comparison")
    395dec6f6bc5 ("Documentation: add doc for sync_file_get_fence()")
    4325198180e5 ("drm/amdgpu: remove GART page addr array")
    4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
    587cdfe9463e ("drm/amd/display: Rename trasnform to dpp for dcn's")
    5aff86c1b325 ("drm/amd/display: Implement input gamma LUT")
    62304fb1fc08 ("dma-buf/sync_file: de-stage sync_file")
    70ccab604049 ("drm/amdgpu/display: Add core dc support for DCN")
    9a70eba7f2c6 ("drm/amd/display: consolidate dce8-11.2 display clock code")
    a1d29476d666 ("drm/amdgpu: optionally enable GART debugfs file")
    a8fe58cec351 ("drm/amd: add ACP driver support")
    b1a4eb992c17 ("drm/amd/display: enable diags compilation")
    b51adc77e220 ("drm/amd/display: Only blank DCN when we have set_blank implementation")
    b70f014d58b9 ("drm/amdgpu: change default sched jobs to 32")
    c784c82a3fd6 ("Documentation: add Sync File doc")
    d4cab38e153d ("staging/android: prepare sync_file for de-staging")
    d7fdb0ae9d11 ("staging/android: rename sync_fence to sync_file")
    f54d1867005c ("dma-buf: Rename struct fence to dma_fence")
    fac8434dab96 ("Documentation: Fix some grammar mistakes in sync_file.txt")
    fdba11f4079e ("drm/amdgpu: move all Kconfig options to amdgpu/Kconfig")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index 9cf139be3f40..f70fcadf1ee5 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -896,10 +896,10 @@  void enc1_stream_encoder_dp_blank(
 	 */
 	REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2);
 	/* Larger delay to wait until VBLANK - use max retry of
-	 * 10us*5000=50ms. This covers 41.7ms of minimum 24 Hz mode +
+	 * 10us*10200=102ms. This covers 100.0ms of minimum 10 Hz mode +
 	 * a little more because we may not trust delay accuracy.
 	 */
-	max_retries = DP_BLANK_MAX_RETRY * 250;
+	max_retries = DP_BLANK_MAX_RETRY * 501;
 
 	/* disable DP stream */
 	REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0);