From patchwork Tue Sep 29 10:57:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 263301 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EA20C4727C for ; Tue, 29 Sep 2020 11:35:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DFD0C2376E for ; Tue, 29 Sep 2020 11:35:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601379353; bh=zivPMAu8jkBPM8BZpt+TkETyOcRAQFI9etCUOvmfXVI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Hvig0ez3IwX4MCKSsJDgTg/BJxUMf82brAnfF21Ade2vWXz1+xwNa2siJwSuQiCHG xCMf/0J1/Wd8ssXzuTGL8ugcml9QZeilJ241X5oA5tYCOAX/I54YygPH9PzA8GPCCR C4IbpvsrpNawKusyquRTHayPXqPe68yno8240Lhc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728652AbgI2Lfx (ORCPT ); Tue, 29 Sep 2020 07:35:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:49162 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729872AbgI2Lfg (ORCPT ); Tue, 29 Sep 2020 07:35:36 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6840F23A9F; Tue, 29 Sep 2020 11:21:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601378517; bh=zivPMAu8jkBPM8BZpt+TkETyOcRAQFI9etCUOvmfXVI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XOhXb1+dB8Nwtdgrc79IkNknVRoxBa0/TjqiTnLRYpoLFLbr/QCktGnPHJV34znTE g8ztpkRguu/kbcvICDnEeOVKMcy/+GGETOuqBku8QPnpgMzw5wzaQmi+bHbsW0whkJ AiyQdsPH+UELmIn4NaO5I8Vvy86BZYjpSAvNT2A0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Mikulas Patocka , Andrew Morton , Dan Williams , Jan Kara , Jeff Moyer , Ingo Molnar , Christoph Hellwig , Toshi Kani , "H. Peter Anvin" , Al Viro , Thomas Gleixner , Matthew Wilcox , Ross Zwisler , Ingo Molnar , Linus Torvalds Subject: [PATCH 4.19 012/245] arch/x86/lib/usercopy_64.c: fix __copy_user_flushcache() cache writeback Date: Tue, 29 Sep 2020 12:57:43 +0200 Message-Id: <20200929105947.589229658@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200929105946.978650816@linuxfoundation.org> References: <20200929105946.978650816@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mikulas Patocka commit a1cd6c2ae47ee10ff21e62475685d5b399e2ed4a upstream. If we copy less than 8 bytes and if the destination crosses a cache line, __copy_user_flushcache would invalidate only the first cache line. This patch makes it invalidate the second cache line as well. Fixes: 0aed55af88345b ("x86, uaccess: introduce copy_from_iter_flushcache for pmem / cache-bypass operations") Signed-off-by: Mikulas Patocka Signed-off-by: Andrew Morton Reviewed-by: Dan Williams Cc: Jan Kara Cc: Jeff Moyer Cc: Ingo Molnar Cc: Christoph Hellwig Cc: Toshi Kani Cc: "H. Peter Anvin" Cc: Al Viro Cc: Thomas Gleixner Cc: Matthew Wilcox Cc: Ross Zwisler Cc: Ingo Molnar Cc: Link: https://lkml.kernel.org/r/alpine.LRH.2.02.2009161451140.21915@file01.intranet.prod.int.rdu2.redhat.com Signed-off-by: Linus Torvalds Signed-off-by: Greg Kroah-Hartman --- arch/x86/lib/usercopy_64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/x86/lib/usercopy_64.c +++ b/arch/x86/lib/usercopy_64.c @@ -139,7 +139,7 @@ long __copy_user_flushcache(void *dst, c */ if (size < 8) { if (!IS_ALIGNED(dest, 4) || size != 4) - clean_cache_range(dst, 1); + clean_cache_range(dst, size); } else { if (!IS_ALIGNED(dest, 8)) { dest = ALIGN(dest, boot_cpu_data.x86_clflush_size);