From patchwork Tue Oct 27 13:55:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 307352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49351C5517A for ; Tue, 27 Oct 2020 16:33:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E94DB21D24 for ; Tue, 27 Oct 2020 16:33:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603816425; bh=nDTdg9vkigXJJd1FTB/cHEAatr2cCXwcOARRfxBsD1c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=jt+WnHgfhs0BsBVoanZEaVSYdz1u4E3AugmsdZ8adV+9swn/DFzzcFoMmwSDuAM80 xyZwnMCkCtokWcHJUDQcb8OQhBRYbBd7YqU+MmY2uCdgBUDVyF8iBdGX79mr2ofyJE JJMWV/Ez/V5RZyDgRuFjfHeIHIDxjKfnvdlNwF9k= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1810068AbgJ0Qd1 (ORCPT ); Tue, 27 Oct 2020 12:33:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:50252 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2441359AbgJ0PtS (ORCPT ); Tue, 27 Oct 2020 11:49:18 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7A8C9223B0; Tue, 27 Oct 2020 15:49:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603813758; bh=nDTdg9vkigXJJd1FTB/cHEAatr2cCXwcOARRfxBsD1c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=0FyunMEY6zxOnGPf2RptLfvRdc/eaa6Cj1iipVu+IkqNkLAhQg00SYOd9a/1LRhIy YJYAtUZBe0ezhX6SHUzDG1zFyPMAqZ+X27sTIntoJMbhCaDqGjohbCsD7MD9GsSBKN Sl47XNOVyCeEluIUaCXjcxMQNMjgKPxIw+E6kbIk= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Brad Bishop , Eddie James , Joel Stanley , Mark Brown , Sasha Levin Subject: [PATCH 5.9 661/757] spi: fsi: Fix clock running too fast Date: Tue, 27 Oct 2020 14:55:11 +0100 Message-Id: <20201027135521.543409402@linuxfoundation.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201027135450.497324313@linuxfoundation.org> References: <20201027135450.497324313@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Brad Bishop [ Upstream commit 0b546bbe9474ff23e6843916ad6d567f703b2396 ] Use a clock divider tuned to a 200MHz FSI bus frequency (the maximum). Use of the previous divider at 200MHz results in corrupt data from endpoint devices. Ideally the clock divider would be calculated from the FSI clock, but that would require some significant work on the FSI driver. With FSI frequencies slower than 200MHz, the SPI clock will simply run slower, but safely. Signed-off-by: Brad Bishop Signed-off-by: Eddie James Signed-off-by: Joel Stanley Link: https://lore.kernel.org/r/20200909222857.28653-3-eajames@linux.ibm.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-fsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsi.c b/drivers/spi/spi-fsi.c index ef5e0826a53c3..a702e9d7d68c0 100644 --- a/drivers/spi/spi-fsi.c +++ b/drivers/spi/spi-fsi.c @@ -403,7 +403,7 @@ static int fsi_spi_transfer_init(struct fsi_spi *ctx) u64 status = 0ULL; u64 wanted_clock_cfg = SPI_FSI_CLOCK_CFG_ECC_DISABLE | SPI_FSI_CLOCK_CFG_SCK_NO_DEL | - FIELD_PREP(SPI_FSI_CLOCK_CFG_SCK_DIV, 4); + FIELD_PREP(SPI_FSI_CLOCK_CFG_SCK_DIV, 19); end = jiffies + msecs_to_jiffies(SPI_FSI_INIT_TIMEOUT_MS); do {