From patchwork Thu Feb 25 19:35:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 387239 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp595087jap; Thu, 25 Feb 2021 11:38:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJyOJpT39n3xElL8cHIFUrDaijk+baxQxH+5Vy8TGAgJ8SiSoY85u88SxAdYf1HjfAGDAmSc X-Received: by 2002:a17:906:1e50:: with SMTP id i16mr4212923ejj.466.1614281936850; Thu, 25 Feb 2021 11:38:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614281936; cv=none; d=google.com; s=arc-20160816; b=KtGWQwkvabYPdTva79FwcGzYkqf/FWCmso7Ywtk2yYo/WsQAKZwHC4CFtdGtkoTe59 ofEcbGLToYe4xjaTOvbZbaAglr3XpjrKNy3QAmZGvC9yWIznkMNhUnJvCovW+u7rmOLQ keizY2jZZAExwVH23cVArXGlIlGks6++V0pew5EC2EvL1c+adz1RkVw6iZy8YmJ+xiMa psI3LBuFEOcnh26cEaVlmJsBkOM+0PxaG4oUNPRNpkfn9EUWOAEBGjqz9rO3wqefQJqi jyoshdiSKKRLjYKKj2A0DVn08+VCwIKCq22aj36tyFZhQEHmCUSp58WlMGgYqAQEIfLK yJcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=8ZD41VBvsNGu06fGpZnejnM1xUEf7RTUIFZxi9ka4CM=; b=Q5fud7KUvVyCGIxiJmJHyOrNpURIIn8w+W+FDGks/4vBMJBTn6eTOO7zycWBA0RQyK rYgSel67hafPl1JebEauwfBeyAjyiWwytcB8EwWEwcTsFFE79tPpG6/7AK3eHyuWL7Qg x8xUMxa5ABm49t5T4yvwuRpwA2F6OzazdGIbisQCQPvmYOXf+T21ii5MyhoX84t6hZCP 8ASrE5/9h/kSSy6Ov1cY3uPNgs/FDoxQmwr6FzVjd6Mnc7e02FSaolOtDHYf39Xs0Uem MxFHSjwzEUFBrQartp6vdbGCqFSpyGSTgT++j/mAdgEE8uqditVx4NkwQ9BIvcG3Q2wU jByA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gb11si3555293ejc.427.2021.02.25.11.38.56; Thu, 25 Feb 2021 11:38:56 -0800 (PST) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233738AbhBYTix (ORCPT + 13 others); Thu, 25 Feb 2021 14:38:53 -0500 Received: from foss.arm.com ([217.140.110.172]:48204 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234339AbhBYTgu (ORCPT ); Thu, 25 Feb 2021 14:36:50 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 483A8139F; Thu, 25 Feb 2021 11:36:05 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 803C03F70D; Thu, 25 Feb 2021 11:36:03 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com, leo.yan@linaro.org, Suzuki K Poulose , stable@vger.kernel.org, Christoffer Dall , Marc Zyngier , Will Deacon , Catalin Marinas , Mark Rutland , Alexandru Elisei Subject: [PATCH v4 04/19] kvm: arm64: nvhe: Save the SPE context early Date: Thu, 25 Feb 2021 19:35:28 +0000 Message-Id: <20210225193543.2920532-5-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com> References: <20210225193543.2920532-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org The nvhe hyp saves the SPE context, flushing any unwritten data before we switch to the guest. But this operation is performed way too late, because : - The ownership of the SPE is transferred to EL2. i.e, using EL2 translations. (MDCR_EL2_E2PB == 0) - The guest Stage1 is loaded. Thus the flush could use the host EL1 virtual address, but use the EL2 translations instead. Fix this by moving the SPE context save early. i.e, Save the context before we load the guest stage1 and before we change the ownership to EL2. The restore path is doing the right thing. Fixes: 014c4c77aad7 ("KVM: arm64: Improve debug register save/restore flow") Cc: stable@vger.kernel.org Cc: Christoffer Dall Cc: Marc Zyngier Cc: Will Deacon Cc: Catalin Marinas Cc: Mark Rutland Cc: Alexandru Elisei Signed-off-by: Suzuki K Poulose --- New patch. --- arch/arm64/include/asm/kvm_hyp.h | 5 +++++ arch/arm64/kvm/hyp/nvhe/debug-sr.c | 12 ++++++++++-- arch/arm64/kvm/hyp/nvhe/switch.c | 12 +++++++++++- 3 files changed, 26 insertions(+), 3 deletions(-) -- 2.24.1 Reviewed-by: Alexandru Elisei diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h index c0450828378b..385bd7dd3d39 100644 --- a/arch/arm64/include/asm/kvm_hyp.h +++ b/arch/arm64/include/asm/kvm_hyp.h @@ -83,6 +83,11 @@ void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt); void __debug_switch_to_guest(struct kvm_vcpu *vcpu); void __debug_switch_to_host(struct kvm_vcpu *vcpu); +#ifdef __KVM_NVHE_HYPERVISOR__ +void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu); +void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu); +#endif + void __fpsimd_save_state(struct user_fpsimd_state *fp_regs); void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs); diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c index 91a711aa8382..f401724f12ef 100644 --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c @@ -58,16 +58,24 @@ static void __debug_restore_spe(u64 pmscr_el1) write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1); } -void __debug_switch_to_guest(struct kvm_vcpu *vcpu) +void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) { /* Disable and flush SPE data generation */ __debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1); +} + +void __debug_switch_to_guest(struct kvm_vcpu *vcpu) +{ __debug_switch_to_guest_common(vcpu); } -void __debug_switch_to_host(struct kvm_vcpu *vcpu) +void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu) { __debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1); +} + +void __debug_switch_to_host(struct kvm_vcpu *vcpu) +{ __debug_switch_to_host_common(vcpu); } diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c index f3d0e9eca56c..10eed66136a0 100644 --- a/arch/arm64/kvm/hyp/nvhe/switch.c +++ b/arch/arm64/kvm/hyp/nvhe/switch.c @@ -192,6 +192,15 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu) pmu_switch_needed = __pmu_switch_to_guest(host_ctxt); __sysreg_save_state_nvhe(host_ctxt); + /* + * For nVHE, we must save and disable any SPE + * buffers, as the translation regime is going + * to be loaded with that of the guest. And we must + * save host context for SPE, before we change the + * ownership to EL2 (via MDCR_EL2_E2PB == 0) and before + * we load guest Stage1. + */ + __debug_save_host_buffers_nvhe(vcpu); __adjust_pc(vcpu); @@ -234,11 +243,12 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu) if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) __fpsimd_save_fpexc32(vcpu); + __debug_switch_to_host(vcpu); /* * This must come after restoring the host sysregs, since a non-VHE * system may enable SPE here and make use of the TTBRs. */ - __debug_switch_to_host(vcpu); + __debug_restore_host_buffers_nvhe(vcpu); if (pmu_switch_needed) __pmu_switch_to_host(host_ctxt);