From patchwork Mon Mar 1 12:54:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 388632 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp3324163jap; Mon, 1 Mar 2021 04:56:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJzx2bm3VSN01FpIF2ip0WxfSObx/rnEBAhAMYnKOIq1mJsYM96jFc7PPzzYxYJYXXyCPuc9 X-Received: by 2002:a17:906:1c98:: with SMTP id g24mr8482711ejh.51.1614603362190; Mon, 01 Mar 2021 04:56:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614603362; cv=none; d=google.com; s=arc-20160816; b=xJeeXop7wTB7Cl2YjbMBvbTFu1/stbQ48JGzlVOoBmGMquDKwGAotuR0mMAghsSIic 7d6YnIo9l2sF4fJim4To50J4gS92esBCPvcXFt3cRYhXcFwxL4irosI6M1EmpLtPT5sZ VHl1L5wj0ly4NwR0qBv40njDlYu1rtrTnbpLAnIOODx55ctm3+Gsm8MDyzUWnWt2oFvq VQ2Od0elirEq/Fxi4g8kxxkEu4x/Dw5auKa2ZmxS++F5AfJ8LvUi93QzIqAj5Jtpgbos A2BoxAPBa/umaf267R/sVaEgAC3Z6Kbs06wrqKZFmneoA4EWqcIYHtAORtRjwGy6weWj 3kOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=MALq5h/UeKgZGQQ0FN08oU+0h/5fpMrO8amz3N9ftIg=; b=WFGqhwJgBpSZ7QN1MCNr47oNIN8nrVuJYpmXiW+TZVMULXdP4W8kV1TtJQbGqq8+ch AGjgKEBmjL/D/AcPE++D9SXWvDwLZX/mOxfEsssJ7C59HUYeeuGpKX4Uc2lziY7W9JRJ b4bxZpH6cYfBHeP7hNmI85cmlTywEdiZLeljQY+oV6I1MhJJdlRD1OjSbko9YvYES1ie mHn8deiNuYvBD6tllG2sIQT4algvDfG6/7lPEYZEoGSOu/vd5z2GLbFPc8D5LUUfY7Br 5QdlDE/nBJQF2sweRMjGX5FWCuhBgJJwK0lnxpa29kPs2Lb/nSR5TPlRejKOqXSn09fG +/Kg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i6si6348725ejz.383.2021.03.01.04.56.02; Mon, 01 Mar 2021 04:56:02 -0800 (PST) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235131AbhCAM4B (ORCPT + 13 others); Mon, 1 Mar 2021 07:56:01 -0500 Received: from foss.arm.com ([217.140.110.172]:57436 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235110AbhCAM4A (ORCPT ); Mon, 1 Mar 2021 07:56:00 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 574561FB; Mon, 1 Mar 2021 04:55:14 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8B5283F70D; Mon, 1 Mar 2021 04:55:13 -0800 (PST) From: Suzuki K Poulose To: stable@vger.kernel.org Cc: suzuki.poulose@arm.com, gregkh@linuxfoundation.org, will@kernel.org, catalin.marinas@arm.com Subject: [PATCH] arm64: Extend workaround for erratum 1024718 to all versions of Cortex-A55 Date: Mon, 1 Mar 2021 12:54:59 +0000 Message-Id: <20210301125459.3046861-1-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <161460092211572@kroah.com> References: <161460092211572@kroah.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org commit c0b15c25d25171db4b70cc0b7dbc1130ee94017d upstream The erratum 1024718 affects Cortex-A55 r0p0 to r2p0. However we apply the work around for r0p0 - r1p0. Unfortunately this won't be fixed for the future revisions for the CPU. Thus extend the work around for all versions of A55, to cover for r2p0 and any future revisions. Cc: stable@vger.kernel.org # v5.4- Cc: Catalin Marinas Cc: Will Deacon Cc: James Morse Cc: Kunihiko Hayashi Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20210203230057.3961239-1-suzuki.poulose@arm.com [will: Update Kconfig help text] Signed-off-by: Will Deacon Signed-off-by: Suzuki K Poulose --- arch/arm64/Kconfig | 2 +- arch/arm64/kernel/cpufeature.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 2.24.1 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index a0bc9bbb92f3..0ad21882aa04 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -489,7 +489,7 @@ config ARM64_ERRATUM_1024718 help This option adds a workaround for ARM Cortex-A55 Erratum 1024718. - Affected Cortex-A55 cores (r0p0, r0p1, r1p0) could cause incorrect + Affected Cortex-A55 cores (all versions) could cause incorrect update of the hardware dirty bit when the DBM/AP bits are updated without a break-before-make. The workaround is to disable the usage of hardware DBM locally on the affected cores. CPUs not affected by diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index f2ec84540414..79caab15ccbf 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1092,7 +1092,7 @@ static bool cpu_has_broken_dbm(void) /* List of CPUs which have broken DBM support. */ static const struct midr_range cpus[] = { #ifdef CONFIG_ARM64_ERRATUM_1024718 - MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 + MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), #endif {}, };