From patchwork Wed May 4 16:58:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 569614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCA20C3A5A1 for ; Wed, 4 May 2022 17:17:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354399AbiEDRVD (ORCPT ); Wed, 4 May 2022 13:21:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358052AbiEDRPi (ORCPT ); Wed, 4 May 2022 13:15:38 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C5EE3562F7 for ; Wed, 4 May 2022 09:59:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5BAF8B827A4 for ; Wed, 4 May 2022 16:59:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2C3EC385A4; Wed, 4 May 2022 16:59:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651683557; bh=V8h5WumA4/xw/iHJoE9XWHKlr+QF96R0HSREn/bgqr4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=toHm8t8bs1U57dqvJhTk4HZngVobPERI6LdIg76eTNcI8LtInsxtee/TV65a0xSYb 80KI1hYsEf/XTXtZT51kQ5kIdKdfIX2SWQs9JB09oQDG0evVMXKlGp76jXci1R9dWz egfocLWNZOjJSW+Kv83/KahnCo6x7dhiBbMZANLH7933PvggztQuHRPlTsdjOFURuM 6CnwEQ1N5BUOcgaAuRVGmQ6tlKkO72LjYp+D0nzhUs2Jt83aeab2lScBUa42N2veqa VhoIaU2LTxv+SGCHm+Tll9KCMJCiw/rn6aC0rcXUK/kB41wOOYMGTx5vubdH53YOEd hfDshPTfvPN8w== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Sasha Levin Cc: stable@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 5.17 13/19] PCI: aardvark: Add support for PME interrupts Date: Wed, 4 May 2022 18:58:46 +0200 Message-Id: <20220504165852.30089-14-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220504165852.30089-1-kabel@kernel.org> References: <20220504165852.30089-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Pali Rohár commit 0fc75d87454195885bd1a81fc7e6ce92572b6109 upstream. Currently enabling PCI_EXP_RTSTA_PME bit in PCI_EXP_RTCTL register does nothing. This is because PCIe PME driver expects to receive PCIe interrupt defined in PCI_EXP_FLAGS_IRQ register, but aardvark hardware does not trigger PCIe INTx/MSI interrupt for PME event, rather it triggers custom aardvark interrupt which this driver is not processing yet. Fix this issue by handling PME interrupt in advk_pcie_handle_int() and chaining it to PCIe interrupt 0 with generic_handle_domain_irq() (since aardvark sets PCI_EXP_FLAGS_IRQ to zero). With this change PCIe PME driver finally starts receiving PME interrupt. Link: https://lore.kernel.org/r/20220110015018.26359-17-kabel@kernel.org Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Signed-off-by: Lorenzo Pieralisi Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 2ae43992cd06..8020dfb8f00e 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1478,6 +1478,18 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); + /* Process PME interrupt */ + if (isr0_status & PCIE_MSG_PM_PME_MASK) { + /* + * Do not clear PME interrupt bit in ISR0, it is cleared by IRQ + * receiver by writing to the PCI_EXP_RTSTA register of emulated + * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, + * so use PCIe interrupt 0. + */ + if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL) + dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n"); + } + /* Process ERR interrupt */ if (isr0_status & PCIE_ISR0_ERR_MASK) { advk_writel(pcie, PCIE_ISR0_ERR_MASK, PCIE_ISR0_REG);