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[203.254.224.24]) by mx.google.com with ESMTP id qd2si31337062pbb.167.2012.06.18.23.40.57; Mon, 18 Jun 2012 23:40:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M5U00M9XQEDLQ00@mailout1.samsung.com>; Tue, 19 Jun 2012 15:40:56 +0900 (KST) X-AuditID: cbfee61a-b7f9f6d0000016a8-9e-4fe01ef85ac1 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 3D.F5.05800.8FE10EF4; Tue, 19 Jun 2012 15:40:56 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M5U00BUEQJL3P50@mmp2.samsung.com>; Tue, 19 Jun 2012 15:40:56 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, alim.akhtar@samsung.com, sjg@chromium.org, hs@denx.de, mk7.kang@samsung.com, chander.kashyap@linaro.org, dofmind@gmail.com Subject: [PATCH 2/8 V3] EXYNOS: Add I2C base address. Date: Tue, 19 Jun 2012 12:15:13 +0530 Message-id: <1340088319-10072-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1340088319-10072-1-git-send-email-rajeshwari.s@samsung.com> References: <1340088319-10072-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrKJMWRmVeSWpSXmKPExsVy+t9jQd0fcg/8DdY3SFo8XH+TxWLK4S8s Dkwed67tYQtgjOKySUnNySxLLdK3S+DKeHXgIlvBZ+6K1U/XszcwzufqYuTgkBAwkXi/uq6L kRPIFJO4cG89WxcjF4eQwHRGieUH5rOBJIQEJjJJ3D6sAGKzCRhJbD05jRHEFhGQkPjVfxXM ZhaYwiixa3UoiC0sYCoxb8oCVhCbRUBV4veUbYwgu3gFPCQ63yhA7FKQODb1K1gJp4CnxKYP C5kgVnlI7Hlxnn0CI+8CRoZVjKKpBckFxUnpuYZ6xYm5xaV56XrJ+bmbGMGefya1g3Flg8Uh RgEORiUe3oPAgBBiTSwrrsw9xCjBwawkwrvq/31/Id6UxMqq1KL8+KLSnNTiQ4zSHCxK4rxN 1hf8hQTSE0tSs1NTC1KLYLJMHJxSDYxbvq0LsJl0zLY0UEJ6jrTJjqjYG7rMoqU8v3bs4Ste q7Fkt5Qbw9WPuiKv19+9u+H7HpFj91Zkzb6izFio7Hfq1r/jdffPrCr9Kt5+Vqi/Ji9NpSty bvqlq/O+ST7d+v3znGU5cwrEzvry/Hyrr/zua5fYmf21/vGMmcWtv+a4Jr5tW7rQ8HS/Ektx RqKhFnNRcSIA6KPZ6/gBAAA= X-TM-AS-MML: No X-Gm-Message-State: ALoCoQnhdI3qFjXKsUrtBWbAJG+ueEsI8RP4WuC4Ozr7JM1CF/CAOA8jjPpkDtYIw/mc1EMBhn1J This patch adds the base address for I2C. Signed-off-by: Alim Akhtar Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V2: - None Changes in V3: - None arch/arm/include/asm/arch-exynos/cpu.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index b1e22f2..093bcc1 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -48,6 +48,7 @@ #define EXYNOS4_SROMC_BASE 0x12570000 #define EXYNOS4_USBPHY_BASE 0x125B0000 #define EXYNOS4_UART_BASE 0x13800000 +#define EXYNOS4_I2C_BASE 0x13860000 #define EXYNOS4_ADC_BASE 0x13910000 #define EXYNOS4_PWMTIMER_BASE 0x139D0000 #define EXYNOS4_MODEM_BASE 0x13A00000 @@ -74,6 +75,7 @@ #define EXYNOS5_USBOTG_BASE 0x12480000 #define EXYNOS5_USBPHY_BASE 0x12480000 #define EXYNOS5_UART_BASE 0x12C00000 +#define EXYNOS5_I2C_BASE 0x12C60000 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000 #define EXYNOS5_GPIO_PART2_BASE 0x13400000 #define EXYNOS5_FIMD_BASE 0x14400000 @@ -146,6 +148,7 @@ SAMSUNG_BASE(adc, ADC_BASE) SAMSUNG_BASE(clock, CLOCK_BASE) SAMSUNG_BASE(sysreg, SYSREG_BASE) SAMSUNG_BASE(fimd, FIMD_BASE) +SAMSUNG_BASE(i2c, I2C_BASE) SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE) SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE) SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)