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[203.254.224.24]) by mx.google.com with ESMTP id wu8si6961347pbc.93.2012.12.05.05.11.23; Wed, 05 Dec 2012 05:11:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of amarendra.xt@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of amarendra.xt@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=amarendra.xt@samsung.com Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MEK00AM67AYBG01@mailout1.samsung.com>; Wed, 05 Dec 2012 22:11:22 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.125]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id C8.50.12699.AF74FB05; Wed, 05 Dec 2012 22:11:22 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-52-50bf47faa4e4 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 78.50.12699.AF74FB05; Wed, 05 Dec 2012 22:11:22 +0900 (KST) Received: from localhost.localdomain ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MEK00BI176AKQA0@mmp1.samsung.com>; Wed, 05 Dec 2012 22:11:22 +0900 (KST) From: Amar To: u-boot@lists.denx.de, jh80.chung@samsung.com Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, afleming@gmail.com Subject: [PATCH 2/4] MMC: EXYNOS: Added call back function for clock get Date: Wed, 05 Dec 2012 19:01:35 +0530 Message-id: <1354714297-11568-3-git-send-email-amarendra.xt@samsung.com> X-Mailer: git-send-email 1.7.0.4 In-reply-to: <1354714297-11568-1-git-send-email-amarendra.xt@samsung.com> References: <1354714297-11568-1-git-send-email-amarendra.xt@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLLMWRmVeSWpSXmKPExsWyRsSkVveX+/4Ag8sLDSwerr/JYjHl8BcW ByaPO9f2sAUwRnHZpKTmZJalFunbJXBlbPh6gLHgM3fFohPt7A2Mtzm7GDk4JARMJHofCnYx cgKZYhIX7q1n62Lk4hASWMoo0bziABtEwkTi1p3HYLaQwCJGifUtdRBF7UwS15Z8YQYZxCag KvFrsT1IjYiAgcT0J9tZQcLMAgUSz3aLgYSFBTwk+uY+ZgexWYCq316YBWbzAsVXXdzKArFK QaJ12SGwOKeAp0Tz3YfsEGs9JA58ucgE0Ssg8W3yIRaI82UlNh1ghmi9zSbxtUsPwpaUOLji BssERuEFjAyrGEVTC5ILipPSc430ihNzi0vz0vWS83M3MQLD8PS/Z9I7GFc1WBxiFOBgVOLh lTDeFyDEmlhWXJl7iFGCg1lJhPem6/4AId6UxMqq1KL8+KLSnNTiQ4w+QIdMZJYSTc4Hxkhe SbyhsYm5qbGppZGRmakpDmElcd5mj5QAIYH0xJLU7NTUgtQimHFMHJxSDYxSm4x2hMpqhW6d Pev88sXVS6TlviidqGIMy3GfVb3ILzh1Zn335ANm+6bpHtTs/2oocfi0ho0m6+ery+1nLTPY IJxxwF4naf3FyHAeDc4dZ/fZ/LfhnLBZ+HztpIeZU/vni4bt/1N8ruX8348XDr+QfTKXI61P xfNMv2yQ/+t3jEKvZmgs/PJYiaU4I9FQi7moOBEAuMrcEnACAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjkeLIzCtJLcpLzFFi42I5/e+xgO4v9/0BBh/2qlo8XH+TxWLK4S8s Dkwed67tYQtgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLx CdB1y8wBmq2kUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzNjw9QBjwWfu ikUn2tkbGG9zdjFyckgImEjcuvOYDcIWk7hwbz2YLSSwiFFifUtdFyMXkN3OJHFtyRfmLkYO DjYBVYlfi+1BakQEDCSmP9nOChJmFiiQeLZbDCQsLOAh0Tf3MTuIzQJU/fbCLDCbFyi+6uJW FohVChKtyw6BxTkFPCWa7z5kh1jrIXHgy0WmCYy8CxgZVjGKphYkFxQnpeca6RUn5haX5qXr JefnbmIEB/oz6R2MqxosDjEKcDAq8fBKGO8LEGJNLCuuzD3EKMHBrCTCe9N1f4AQb0piZVVq UX58UWlOavEhRh+gqyYyS4km5wOjMK8k3tDYxNzU2NTSxMLEzBKHsJI4b7NHSoCQQHpiSWp2 ampBahHMOCYOTqkGRuunwqqOnEf7VXLnz7dw67F4tuR0scPt0K7rnsv/a97Pzt74vGKqmYdW zsKm1efOrY3fcnPWRU7uswFWb+Lun0hctOTEidk7ypd/5vi5+u0ko7XpMj/dNt44tezZziO9 lqmTjO/2BbgWWWXYJzrsvKYbFHSmfsLmVe1bOZdnTu1R89Q+GM7eOkuJpTgj0VCLuag4EQA1 Sr8roQIAAA== X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQlTc2EV6iZzattC/K+Zkcn2OGJWzM7qG7qqiy1LvjrdjQmlNpJvMqXX2EP64Zg8jFZfYpK0 This patch defines the call back required by dw mmc driver to get the clock value. It also adds function to set the dw mmc clock divider ratio. Signed-off-by: Amarendra Reddy --- drivers/mmc/exynos_dw_mmc.c | 14 +++++++++++++- 1 files changed, 13 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 72a31b7..7cc8aba 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -30,25 +30,37 @@ static void exynos_dwmci_clksel(struct dwmci_host *host) { u32 val; val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) | - DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0); + DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | + DWMCI_SET_DIV_RATIO(DWMCI_SHIFT_0); dwmci_writel(host, DWMCI_CLKSEL, val); } +unsigned int exynos_dwmci_get_clk(int dev_index) +{ + return get_mmc_clk(dev_index); +} + int exynos_dwmci_init(u32 regbase, int bus_width, int index) { struct dwmci_host *host = NULL; + int div = 0; host = malloc(sizeof(struct dwmci_host)); if (!host) { printf("dwmci_host malloc fail!\n"); return 1; } + div = 1; + /* Set the mmc clock divider ratio & pre-ratio */ + set_mmc_clk(index, div); + host->name = EXYNOS_NAME; host->ioaddr = (void *)regbase; host->buswidth = bus_width; host->clksel = exynos_dwmci_clksel; host->dev_index = index; + host->mmc_clk = exynos_dwmci_get_clk; add_dwmci(host, 52000000, 400000);