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[203.254.224.33]) by mx.google.com with ESMTP id pu7si598863pbc.82.2013.02.18.22.25.28; Mon, 18 Feb 2013 22:25:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MIG000ASF5R4EF0@mailout3.samsung.com>; Tue, 19 Feb 2013 15:25:28 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 68.72.05791.7DA13215; Tue, 19 Feb 2013 15:25:28 +0900 (KST) X-AuditID: cbfee690-b7f066d00000169f-00-51231ad7488b Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 8B.C3.03880.7DA13215; Tue, 19 Feb 2013 15:25:27 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MIG0030DF6A8M90@mmp2.samsung.com>; Tue, 19 Feb 2013 15:25:27 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH] EXYNOS: Correct ordering of SPL machine_params Date: Tue, 19 Feb 2013 12:02:59 +0530 Message-id: <1361255579-22801-1-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMLMWRmVeSWpSXmKPExsWyRsSkRveGlHKgwZ5uFouH62+yWEw5/IXF gcnjzrU9bAGMUVw2Kak5mWWpRfp2CVwZjxctZCrYylnxovEbcwPjU/YuRk4OCQETibbdu1gg bDGJC/fWs3UxcnEICSxllFi1ZSMzTNGxg51QiemMEi+27GOBcCYySaw4+BSsik3ASGLryWmM ILaIgITEr/6rYDazQIzE6/0/2EBsYQF7ibkLjjOB2CwCqhIrfj9mBbF5BTwkfv/ZywSxTUHi 2NSvrCALJAQOsEncnXKTFaJBQOLb5ENAmzmAErISmw5AXScpcXDFDZYJjIILGBlWMYqmFiQX FCelF5noFSfmFpfmpesl5+duYgQG2Ol/zybsYLx3wPoQYzLQuInMUqLJ+cAAzSuJNzQ2MTc1 NjUzsrS0NCVNWEmcV/6STKCQQHpiSWp2ampBalF8UWlOavEhRiYOTqkGxmDVxJ5FvGcnLhTL flTp+uPriicqjhwWy59ILJ9WdHVD/P3jpY/erbmw6NoyLu3A28zl2rF5bUcYP055W9d94h2f 9opbG7OncGokLp3oOvO4WkNy8fm9p+bHMF33LDhweWNoxcszZ5hFZ3PnvNStDG/n5LySMZn1 dq6PiedjhYg5lcEtgp9jbyuxFGckGmoxFxUnAgCQrXbxRgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t9jQd3rUsqBBkunyVs8XH+TxWLK4S8s Dkwed67tYQtgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLx CdB1y8wBmq2kUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzHi8aCFTwVbO iheN35gbGJ+ydzFyckgImEgcO9jJBmGLSVy4tx7I5uIQEpjOKPFiyz4WCGcik8SKg0+ZQarY BIwktp6cxghiiwhISPzqvwpmMwvESLze/wNskrCAvcTcBceZQGwWAVWJFb8fs4LYvAIeEr// 7GWC2KYgcWzqV9YJjNwLGBlWMYqmFiQXFCel5xrpFSfmFpfmpesl5+duYgSH7zPpHYyrGiwO MQpwMCrx8H5wVAoUYk0sK67MPcQowcGsJMIbxKocKMSbklhZlVqUH19UmpNafIgxGWj7RGYp 0eR8YGzllcQbGpuYmxqbWppYmJhZkiasJM7LeOpJgJBAemJJanZqakFqEcwWJg5OqQbG9tvt u7kKHqUaZZTW9sVO/Df5tul6C4k/9VMUr+mzO8xkrfiVvFfXsM7hleByW4mTE4X+rzq7+9pq 47ZDalYiJwuzd7ir6JyMnO6z8/Pta38vBifliCqcXq1z1CzkMEte/I36u68D5rMWR/YfFnV7 PVFGW49/ikWH6/OlyquvSITdDtlttYVFiaU4I9FQi7moOBEAYiFll6MCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQkXwXTaquzLJzTplxL0xcgog5LX5w/xLZloCoG256+XSxFne+WC2GpKw7PMzQN92hVVA/YU From: Simon Glass The mem_manuf is not in the correct order according to the string table. This causes cros_bundle_firmware to get the BL2 settings in the wrong order. This patch fixes the same. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- arch/arm/include/asm/arch-exynos/spl.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/spl.h b/arch/arm/include/asm/arch-exynos/spl.h index 306b41d..46b25a6 100644 --- a/arch/arm/include/asm/arch-exynos/spl.h +++ b/arch/arm/include/asm/arch-exynos/spl.h @@ -78,11 +78,12 @@ struct spl_machine_param { */ u32 uboot_size; enum boot_mode boot_source; /* Boot device */ - enum mem_manuf mem_manuf; /* Memory Manufacturer */ unsigned frequency_mhz; /* Frequency of memory in MHz */ unsigned arm_freq_mhz; /* ARM Frequency in MHz */ u32 serial_base; /* Serial base address */ u32 i2c_base; /* i2c base address */ + u32 board_rev_gpios; /* Board revision GPIOs */ + enum mem_manuf mem_manuf; /* Memory Manufacturer */ } __attribute__((__packed__)); #endif