From patchwork Fri Mar 18 07:41:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 64027 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp900140lbc; Fri, 18 Mar 2016 00:41:57 -0700 (PDT) X-Received: by 10.28.22.74 with SMTP id 71mr15074696wmw.47.1458286917317; Fri, 18 Mar 2016 00:41:57 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id v19si14662765wjq.20.2016.03.18.00.41.57; Fri, 18 Mar 2016 00:41:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 80046A76BC; Fri, 18 Mar 2016 08:41:44 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Mcl0ob_x3Dh0; Fri, 18 Mar 2016 08:41:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DCFCDA76BB; Fri, 18 Mar 2016 08:41:43 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 53F06A7616 for ; Fri, 18 Mar 2016 08:41:24 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jrujJRfNM5LC for ; Fri, 18 Mar 2016 08:41:24 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg012-v.nifty.com (conuserg012.nifty.com [202.248.44.38]) by theia.denx.de (Postfix) with ESMTPS id 608A1A7673 for ; Fri, 18 Mar 2016 08:41:21 +0100 (CET) Received: from beagle.diag.org (p14090-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.90]) (authenticated) by conuserg012-v.nifty.com with ESMTP id u2I7f6Wb028808; Fri, 18 Mar 2016 16:41:11 +0900 X-Nifty-SrcIP: [153.142.97.90] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 18 Mar 2016 16:41:46 +0900 Message-Id: <1458286912-3475-8-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1458286912-3475-1-git-send-email-yamada.masahiro@socionext.com> References: <1458286912-3475-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 07/13] ARM: uniphier: add work-around to support Micro Support Card v3.6.10 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Due to some hardware guy's awful work, this version is not compatible with v3.6: the logic of BIT(0) of the reset logic is inverted! (and v3.6.10 is horribly wrong in multiple ways), but this is what we have to solve now. The v3.6 expects 0x0000 set to the register for reset de-assertion, while v3.6 does 0x0001. This commit (ab)uses another bug of v3.6.10 to work around the issue. The UniPhier System Bus is a 16-bit bus, which this support card is connected to. A 32-bit write to the bus (writel() function call) is divided into two 16-bit write transactions, with LSB the first. What is amazing for v3.6.10 is that access to address 4N + 2 goes to 4N (Jesus Christ!). For clarification, things are like this: writel(0x00010000, MICRO_SUPPORT_CARD_RESET); is done with two bus transactions as follows [1] write 0x0000 to address MICRO_SUPPORT_CARD [2] write 0x0001 to address MICRO_SUPPORT_CARD + 2 For v3.6, [1] is written to the register and [2] is correctly ignored because there is nothing at the address MICRO_SUPPORT_CARD + 2. This is what we expect. For v3.6.10, [1] is written to the reset register and then [2] is over-written to the same register due to the bus access bug. For the latter, it produces a glitch signal to the BIT[0], so the device state is lost due to the reset pulse. This solution only works for the start-up code. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/micro-support-card.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index f7a37e3..eeb515a 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -25,12 +25,12 @@ */ void support_card_reset_deassert(void) { - writel(0, MICRO_SUPPORT_CARD_RESET); + writel(0x00010000, MICRO_SUPPORT_CARD_RESET); } void support_card_reset(void) { - writel(3, MICRO_SUPPORT_CARD_RESET); + writel(0x00020003, MICRO_SUPPORT_CARD_RESET); } static int support_card_show_revision(void)