From patchwork Wed Jun 22 14:34:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jon Medhurst \(Tixy\)" X-Patchwork-Id: 70663 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp2602688qgy; Wed, 22 Jun 2016 08:18:37 -0700 (PDT) X-Received: by 10.28.236.73 with SMTP id k70mr8765429wmh.65.1466608717527; Wed, 22 Jun 2016 08:18:37 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id n125si1403788wmb.87.2016.06.22.08.18.25; Wed, 22 Jun 2016 08:18:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 751034BA35; Wed, 22 Jun 2016 17:18:24 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id INu8SkuhvWlm; Wed, 22 Jun 2016 17:18:24 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 272194B9B1; Wed, 22 Jun 2016 17:18:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 367E54B9CB for ; Wed, 22 Jun 2016 17:00:08 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id if768S-QgD67 for ; Wed, 22 Jun 2016 17:00:08 +0200 (CEST) X-Greylist: delayed 1523 seconds by postgrey-1.34 at theia; Wed, 22 Jun 2016 17:00:04 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from queue01a.mail.zen.net.uk (queue01a.mail.zen.net.uk [212.23.3.234]) by theia.denx.de (Postfix) with ESMTP id 095374B9B0 for ; Wed, 22 Jun 2016 17:00:04 +0200 (CEST) Received: from [212.23.1.23] (helo=smarthost03d.mail.zen.net.uk) by queue01a.mail.zen.net.uk with esmtp (Exim 4.72) (envelope-from ) id 1bFjEn-0001t9-5b for u-boot@lists.denx.de; Wed, 22 Jun 2016 14:34:41 +0000 Received: from [82.69.122.217] (helo=linaro2) by smarthost03d.mail.zen.net.uk with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1bFjEi-0003tN-Qn; Wed, 22 Jun 2016 14:34:36 +0000 Message-ID: <1466606076.3026.30.camel@linaro.org> From: "Jon Medhurst (Tixy)" To: Albert Aribaud , u-boot@lists.denx.de Date: Wed, 22 Jun 2016 15:34:36 +0100 X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 X-Originating-smarthost03d-IP: [82.69.122.217] X-Mailman-Approved-At: Wed, 22 Jun 2016 17:18:20 +0200 Cc: Andre Przywara Subject: [U-Boot] [PATCH] ARM: vexpress: Remove virt and nonsec support for TC2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When CPU's come out of reset they are in secure state supervisor mode, so this is the state Linux kernel entry point is called in when it brings up secondary CPU cores or the primary CPU restarts after power management has sent it through an off/on transition. As U-Boot starts the kernel in hypervisor mode and the kernel expects and checks that CPUs start in the same state as initial boot this results in a dead system. Specifically, it crashes early in boot when the primary CPU runs the MCPM test [1] and even if power management features are disabled it will still refuse to bring up any secondary CPUs. Fix this problem by removing U-Boot support for virt and nonsec support on TC2. [1] http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=3592d7e002438980f9ce4a399f21ec94cbf071ea Signed-off-by: Jon Medhurst --- arch/arm/Kconfig | 2 -- board/armltd/vexpress/vexpress_common.c | 15 --------------- 2 files changed, 17 deletions(-) -- 2.1.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e9d2fc9..2e48568 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -293,8 +293,6 @@ config ARCH_BCM283X config TARGET_VEXPRESS_CA15_TC2 bool "Support vexpress_ca15_tc2" select CPU_V7 - select CPU_V7_HAS_NONSEC - select CPU_V7_HAS_VIRT config TARGET_VEXPRESS_CA5X2 bool "Support vexpress_ca5x2" diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c index d3b3b31..fe5d163 100644 --- a/board/armltd/vexpress/vexpress_common.c +++ b/board/armltd/vexpress/vexpress_common.c @@ -180,18 +180,3 @@ void lowlevel_init(void) ulong get_board_rev(void){ return readl((u32 *)SYS_ID); } - -#ifdef CONFIG_ARMV7_NONSEC -/* Setting the address at which secondary cores start from. - * Versatile Express uses one address for all cores, so ignore corenr - */ -void smp_set_core_boot_addr(unsigned long addr, int corenr) -{ - /* The SYSFLAGS register on VExpress needs to be cleared first - * by writing to the next address, since any writes to the address - * at offset 0 will only be ORed in - */ - writel(~0, CONFIG_SYSFLAGS_ADDR + 4); - writel(addr, CONFIG_SYSFLAGS_ADDR); -} -#endif