From patchwork Mon Sep 26 11:45:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 77016 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp1128934qgf; Mon, 26 Sep 2016 04:43:57 -0700 (PDT) X-Received: by 10.194.192.35 with SMTP id hd3mr17641786wjc.27.1474890237692; Mon, 26 Sep 2016 04:43:57 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id e73si8176632wme.63.2016.09.26.04.43.57; Mon, 26 Sep 2016 04:43:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2C9C1A758E; Mon, 26 Sep 2016 13:43:57 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id e3f6mZ-aEQv1; Mon, 26 Sep 2016 13:43:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AF258A7576; Mon, 26 Sep 2016 13:43:56 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 223F2A7527 for ; Mon, 26 Sep 2016 13:43:52 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X1EtZbMOsYXk for ; Mon, 26 Sep 2016 13:43:52 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-07.nifty.com (conuserg-07.nifty.com [210.131.2.74]) by theia.denx.de (Postfix) with ESMTPS id 0C977A75D2 for ; Mon, 26 Sep 2016 13:43:47 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id u8QBhEa3019599; Mon, 26 Sep 2016 20:43:17 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com u8QBhEa3019599 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1474890197; bh=Hegv0huTQV9rCGX3jeW/fzM+cXefJrlG79khwYgvynE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BtNRCmNqqyfGD7Zh/STC1BgRRUSd3GpM8hZskEdmRwG8I1U4D+N7pNJGTj/ae5kRO nJe6TCAFVPm5XAX9GAOSN1i6cEUPVJIwPCcKykNlTzcUtRX10EsrX31brVH88mc+bQ dmTuV7NEYrEqUrAsIosjIMxxn8dKwnAKUUuDFi4uEOa6J5cO/rTvrk7XzBFBlu0PHh uMjI6/He+WEzhv9BPBezbj+oVtOXigo0aFWxeyLQJahe9QuPEydTMtLl4SNOCW+2UT /cdGiKPfCCpdYFQ8k5DO0vhdGRr5Eo66lmiWh6x3oVae7sLzgTZjYcknXjEluwN0aJ URIarfaGulOYA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Mon, 26 Sep 2016 20:45:26 +0900 Message-Id: <1474890327-478-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1474890327-478-1-git-send-email-yamada.masahiro@socionext.com> References: <1474890327-478-1-git-send-email-yamada.masahiro@socionext.com> Cc: Tom Rini , Carlos Hernandez Subject: [U-Boot] [PATCH 2/3] ARM: keystone: rename clk_get_rate() to ks_clk_get_rate() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The KeyStone platform has its own clk_get_rate() but its prototype is different from that of the common-clk (clk-uclass) framework. Prefix the KeyStone specific implementation with _ks in order to avoid name-space conflict. Signed-off-by: Masahiro Yamada --- arch/arm/include/asm/ti-common/keystone_net.h | 4 ++-- arch/arm/mach-keystone/clock.c | 24 ++++++++++++------------ arch/arm/mach-keystone/cmd_clock.c | 2 +- arch/arm/mach-keystone/include/mach/clock.h | 2 +- include/configs/ti_armv7_keystone2.h | 8 ++++---- 5 files changed, 20 insertions(+), 20 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h index a0d0d9b..0627728 100644 --- a/arch/arm/include/asm/ti-common/keystone_net.h +++ b/arch/arm/include/asm/ti-common/keystone_net.h @@ -51,9 +51,9 @@ /* MDIO module input frequency */ #ifdef CONFIG_SOC_K2G -#define EMAC_MDIO_BUS_FREQ (clk_get_rate(sys_clk0_3_clk)) +#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(sys_clk0_3_clk)) #else -#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk)) +#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(pass_pll_clk)) #endif /* MDIO clock output frequency */ #define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */ diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c index b25db1e..d8804724 100644 --- a/arch/arm/mach-keystone/clock.c +++ b/arch/arm/mach-keystone/clock.c @@ -341,7 +341,7 @@ static unsigned long pll_freq_get(int pll) return ret; } -unsigned long clk_get_rate(unsigned int clk) +unsigned long ks_clk_get_rate(unsigned int clk) { unsigned long freq = 0; @@ -381,37 +381,37 @@ unsigned long clk_get_rate(unsigned int clk) freq = pll_freq_get(CORE_PLL) / pll0div_read(4); break; case sys_clk0_2_clk: - freq = clk_get_rate(sys_clk0_clk) / 2; + freq = ks_clk_get_rate(sys_clk0_clk) / 2; break; case sys_clk0_3_clk: - freq = clk_get_rate(sys_clk0_clk) / 3; + freq = ks_clk_get_rate(sys_clk0_clk) / 3; break; case sys_clk0_4_clk: - freq = clk_get_rate(sys_clk0_clk) / 4; + freq = ks_clk_get_rate(sys_clk0_clk) / 4; break; case sys_clk0_6_clk: - freq = clk_get_rate(sys_clk0_clk) / 6; + freq = ks_clk_get_rate(sys_clk0_clk) / 6; break; case sys_clk0_8_clk: - freq = clk_get_rate(sys_clk0_clk) / 8; + freq = ks_clk_get_rate(sys_clk0_clk) / 8; break; case sys_clk0_12_clk: - freq = clk_get_rate(sys_clk0_clk) / 12; + freq = ks_clk_get_rate(sys_clk0_clk) / 12; break; case sys_clk0_24_clk: - freq = clk_get_rate(sys_clk0_clk) / 24; + freq = ks_clk_get_rate(sys_clk0_clk) / 24; break; case sys_clk1_3_clk: - freq = clk_get_rate(sys_clk1_clk) / 3; + freq = ks_clk_get_rate(sys_clk1_clk) / 3; break; case sys_clk1_4_clk: - freq = clk_get_rate(sys_clk1_clk) / 4; + freq = ks_clk_get_rate(sys_clk1_clk) / 4; break; case sys_clk1_6_clk: - freq = clk_get_rate(sys_clk1_clk) / 6; + freq = ks_clk_get_rate(sys_clk1_clk) / 6; break; case sys_clk1_12_clk: - freq = clk_get_rate(sys_clk1_clk) / 12; + freq = ks_clk_get_rate(sys_clk1_clk) / 12; break; default: break; diff --git a/arch/arm/mach-keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c index 3d5cf3f..06afa72 100644 --- a/arch/arm/mach-keystone/cmd_clock.c +++ b/arch/arm/mach-keystone/cmd_clock.c @@ -74,7 +74,7 @@ int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) clk = simple_strtoul(argv[1], NULL, 10); - freq = clk_get_rate(clk); + freq = ks_clk_get_rate(clk); if (freq) printf("clock index [%d] - frequency %lu\n", clk, freq); else diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h index e2bdec1..0d8a944 100644 --- a/arch/arm/mach-keystone/include/mach/clock.h +++ b/arch/arm/mach-keystone/include/mach/clock.h @@ -125,7 +125,7 @@ extern int speeds[]; void init_plls(void); void init_pll(const struct pll_init_data *data); struct pll_init_data *get_pll_init_data(int pll); -unsigned long clk_get_rate(unsigned int clk); +unsigned long ks_clk_get_rate(unsigned int clk); int get_max_dev_speed(int *spds); int get_max_arm_speed(int *spds); void pll_pa_clk_sel(void); diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index d8f0847..d7bfacc 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -68,14 +68,14 @@ #define CONFIG_CONS_INDEX 1 #ifndef CONFIG_SOC_K2G -#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6) +#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6) #else -#define CONFIG_SYS_NS16550_CLK clk_get_rate(uart_pll_clk) / 2 +#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2 #endif /* SPI Configuration */ #define CONFIG_DAVINCI_SPI -#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6) +#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #define CONFIG_SYS_SPI0 @@ -314,7 +314,7 @@ #include #include #ifndef CONFIG_SOC_K2G -#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6) +#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6) #else #define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk] #endif