From patchwork Sun Jan 1 12:11:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 89435 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp7186717qgi; Sun, 1 Jan 2017 04:12:41 -0800 (PST) X-Received: by 10.194.106.41 with SMTP id gr9mr55421781wjb.202.1483272761137; Sun, 01 Jan 2017 04:12:41 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id p6si39859541wji.227.2017.01.01.04.12.40; Sun, 01 Jan 2017 04:12:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DB34CB3864; Sun, 1 Jan 2017 13:12:34 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7moF8XVMu7Ei; Sun, 1 Jan 2017 13:12:34 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 840BAB3873; Sun, 1 Jan 2017 13:12:32 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 857BFA75FB for ; Sun, 1 Jan 2017 13:12:27 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 158Us-WNmPZZ for ; Sun, 1 Jan 2017 13:12:27 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-07.nifty.com (conuserg-07.nifty.com [210.131.2.74]) by theia.denx.de (Postfix) with ESMTPS id B5A48A75C9 for ; Sun, 1 Jan 2017 13:12:26 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-07.nifty.com with ESMTP id v01CBUjh001226; Sun, 1 Jan 2017 21:11:42 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v01CBUjh001226 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1483272703; bh=0ouM/r7h7lG3TQckcNQjP0Ia7vCw8+EqVLTRJbeorqg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VHUh30GRyAIcdiioDE3lZ68Z5Is8TQ2k10HlOEJM4yrS5RJQEBcK/j+Szh3Fbbdvq Y/hjD1FS5KutUISjl3UY2se5jHCP+eCPxDD84g4RKLm82E/NIG1m1CnXL7uUOeYGkG gkJ9N+0qora3TKSRcUFEknR3aCi3KAj2IqMGM1Czi9UM3VLGRw0dqwgutAW+XHweos CCkDq46TB9NxwTEbWwc/mknXl2mpLJ+G/ZilLWF1YCu8YtnCyPpB0VsTLJjX/k5YQc RkHQBPeXwJz0P9OQu8889C/bHTNkER3eiSQbl22C8LPBFwtPggKvkdLKIYbiOgMYed 61nI9ZqaoeSug== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sun, 1 Jan 2017 21:11:15 +0900 Message-Id: <1483272678-14444-5-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483272678-14444-1-git-send-email-yamada.masahiro@socionext.com> References: <1483272678-14444-1-git-send-email-yamada.masahiro@socionext.com> Cc: Marek Vasut , Stefan Roese , Chin Liang See , Vladimir Zapolskiy , Christian Riesch , Fabio Estevam Subject: [U-Boot] [PATCH 4/7] mmc: move DesignWare-based drivers to Kconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Move (and rename) the following CONFIG options to Kconfig: CONFIG_EXYNOS_DWMMC (renamed to CONFIG_MMC_DW_EXYNOS) CONFIG_HIKEY_DWMMC (renamed to CONFIG_MMC_DW_K3) CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA) The "HIKEY" is a board name, so it is not suitable for the MMC controller name. I am following the name used in Linux. This commit was generated as follows: [1] Rename the config options with the following command: find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e ' s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g ' [2] Commit the changes [3] Create the entries in drivers/mmc/Kconfig (with default y for EXYNOS and SOCFPGA) [4] Run the following: tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA [5] Sort and align drivers/mmc/Makefile for readability Signed-off-by: Masahiro Yamada --- configs/hikey_defconfig | 1 + doc/README.socfpga | 3 --- drivers/mmc/Kconfig | 28 ++++++++++++++++++++++++++++ drivers/mmc/Makefile | 10 +++++----- include/configs/exynos-common.h | 1 - include/configs/hikey.h | 1 - include/configs/socfpga_common.h | 1 - 7 files changed, 34 insertions(+), 11 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Simon Glass diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 4a9546a..539c7d3 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -11,5 +11,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y CONFIG_MMC_DW=y +CONFIG_MMC_DW_K3=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/doc/README.socfpga b/doc/README.socfpga index e61bfef..e717637 100644 --- a/doc/README.socfpga +++ b/doc/README.socfpga @@ -19,6 +19,3 @@ controller support within SOCFPGA #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM - -#define CONFIG_SOCFPGA_DWMMC --> Enable the SOCFPGA specific driver for DesignWare SDMMC controller diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index e9458ef..34fd162 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -75,6 +75,24 @@ config MMC_DW block, this provides host support for SD and MMC interfaces, in both PIO, internal DMA mode and external DMA mode. +config MMC_DW_EXYNOS + bool "Exynos specific extensions for Synopsys DW Memory Card Interface" + depends on ARCH_EXYNOS + depends on MMC_DW + default y + help + This selects support for Samsung Exynos SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Exynos4 and Exynos5 SoC's. + +config MMC_DW_K3 + bool "K3 specific extensions for Synopsys DW Memory Card Interface" + depends on MMC_DW + help + This selects support for Hisilicon K3 SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Hisilicon K3 SoC's. + config MMC_DW_ROCKCHIP bool "Rockchip SD/MMC controller support" depends on DM_MMC && OF_CONTROL @@ -85,6 +103,16 @@ config MMC_DW_ROCKCHIP SD 3.0, SDIO 3.0 and MMC 4.5 and supports common eMMC chips as well as removeable SD and micro-SD cards. +config MMC_DW_SOCFPGA + bool "SOCFPGA specific extensions for Synopsys DW Memory Card Interface" + depends on ARCH_SOCFPGA + depends on MMC_DW + default y + help + This selects support for Altera SOCFPGA specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Altera SOCFPGA. + config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support" depends on RMOBILE diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 74a8881..439afbe 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -17,9 +17,11 @@ obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o obj-$(CONFIG_ATMEL_SDHCI) += atmel_sdhci.o obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o -obj-$(CONFIG_MMC_DW) += dw_mmc.o -obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o -obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o +obj-$(CONFIG_MMC_DW) += dw_mmc.o +obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o +obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o +obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o +obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o @@ -36,7 +38,6 @@ obj-$(CONFIG_MXS_MMC) += mxsmmc.o obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o obj-$(CONFIG_X86) += pci_mmc.o obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o -obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_S3C_SDI) += s3c_sdi.o ifdef CONFIG_BLK @@ -46,7 +47,6 @@ endif endif obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o -obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 0105f4a..cdbe154 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -39,7 +39,6 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_EXYNOS_DWMMC #define CONFIG_BOUNCE_BUFFER /* PWM */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 242ed53..4048bce 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -72,7 +72,6 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_HIKEY_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FS_EXT4 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index ea914de..589fb91 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -144,7 +144,6 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_GENERIC_MMC -#define CONFIG_SOCFPGA_DWMMC /* FIXME */ /* using smaller max blk cnt to avoid flooding the limited stack we have */ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */