From patchwork Sun Jan 15 05:59:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 91515 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp888503qgi; Sat, 14 Jan 2017 22:00:01 -0800 (PST) X-Received: by 10.28.109.218 with SMTP id b87mr7253124wmi.52.1484460001105; Sat, 14 Jan 2017 22:00:01 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id k22si17053698wrc.273.2017.01.14.22.00.00; Sat, 14 Jan 2017 22:00:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 06B1BB3873; Sun, 15 Jan 2017 06:59:58 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gzRbm_GQ0rzO; Sun, 15 Jan 2017 06:59:57 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F2215B387D; Sun, 15 Jan 2017 06:59:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 05283B3865 for ; Sun, 15 Jan 2017 06:59:40 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id glcb7LL5zpWn for ; Sun, 15 Jan 2017 06:59:39 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-10.nifty.com (conuserg-10.nifty.com [210.131.2.77]) by theia.denx.de (Postfix) with ESMTPS id 23FD4A75C2 for ; Sun, 15 Jan 2017 06:59:36 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-10.nifty.com with ESMTP id v0F5xD3h016694; Sun, 15 Jan 2017 14:59:18 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v0F5xD3h016694 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484459959; bh=MboD5Zo539hnyB1pb8dkxyiwT2DFQPH/RwGeba+cFfY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HcuUyIh04Kuv7uqQ/HU2gYZ6V2sbUgkyJnL9WO3eWum8iUANwqO7QPetHUJ2jybaO wJnABvV33WYmnpewrQ0cZcT9FGuLYTCJ0hcdPAeJCsG3PzI9lTi2pdTCTUkU9xnZlU LA8IN+NKHNw30B8vBzzid6zTXCZcTemHCb45wlNjDq6IEBzFXzLg2hCzg4wUO7MMmS fo8kcYxL5gx5aC9beVKMC6qfaxROSflikzTlrLFna1jmBrYX0EYfpyf7WAOn4fyhn8 etK5Z7k/51sxq2EUYHkblR7/X6Q8QNhzgJvf6vnHUvGRUGhsXnKopsK9nEdSETXarA qc+D6K5h35wkQ== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sun, 15 Jan 2017 14:59:04 +0900 Message-Id: <1484459950-8644-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484459950-8644-1-git-send-email-yamada.masahiro@socionext.com> References: <1484459950-8644-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 3/9] ARM: uniphier: refactor MEMCONF init code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code. There are 3 patterns in terms of MEMCONF init: - DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11 - DRAM 3 channels: sLD3 - DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20 All of them can be moved into a single file by a little more refactoring. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 3 +- arch/arm/mach-uniphier/init.h | 6 +- arch/arm/mach-uniphier/init/init-ld11.c | 2 +- arch/arm/mach-uniphier/init/init-ld20.c | 3 +- arch/arm/mach-uniphier/init/init-ld4.c | 2 +- arch/arm/mach-uniphier/init/init-pro4.c | 2 +- arch/arm/mach-uniphier/init/init-pro5.c | 2 +- arch/arm/mach-uniphier/init/init-pxs2.c | 3 +- arch/arm/mach-uniphier/init/init-sld3.c | 3 +- arch/arm/mach-uniphier/init/init-sld8.c | 2 +- arch/arm/mach-uniphier/memconf.c | 163 ++++++++++++++++++++++++++ arch/arm/mach-uniphier/memconf/Makefile | 9 -- arch/arm/mach-uniphier/memconf/memconf-pxs2.c | 68 ----------- arch/arm/mach-uniphier/memconf/memconf-sld3.c | 60 ---------- arch/arm/mach-uniphier/memconf/memconf.c | 107 ----------------- 15 files changed, 176 insertions(+), 259 deletions(-) create mode 100644 arch/arm/mach-uniphier/memconf.c delete mode 100644 arch/arm/mach-uniphier/memconf/Makefile delete mode 100644 arch/arm/mach-uniphier/memconf/memconf-pxs2.c delete mode 100644 arch/arm/mach-uniphier/memconf/memconf-sld3.c delete mode 100644 arch/arm/mach-uniphier/memconf/memconf.c -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index ae78548..98b42a0 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -4,7 +4,8 @@ ifdef CONFIG_SPL_BUILD -obj-y += init/ bcu/ memconf/ +obj-y += memconf.o +obj-y += init/ bcu/ obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ else diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index 327fa8b..0708aa0 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -77,9 +77,9 @@ static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd) int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd); int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd); -int memconf_init(const struct uniphier_board_data *bd); -int uniphier_sld3_memconf_init(const struct uniphier_board_data *bd); -int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd); +int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd); +int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd); +int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd); int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd); int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd); diff --git a/arch/arm/mach-uniphier/init/init-ld11.c b/arch/arm/mach-uniphier/init/init-ld11.c index 9d43a13..93b2162 100644 --- a/arch/arm/mach-uniphier/init/init-ld11.c +++ b/arch/arm/mach-uniphier/init/init-ld11.c @@ -25,7 +25,7 @@ int uniphier_ld11_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); + uniphier_memconf_2ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c index 6702430..de39b9a 100644 --- a/arch/arm/mach-uniphier/init/init-ld20.c +++ b/arch/arm/mach-uniphier/init/init-ld20.c @@ -25,8 +25,7 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); - uniphier_pxs2_memconf_init(bd); + uniphier_memconf_3ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-ld4.c b/arch/arm/mach-uniphier/init/init-ld4.c index 5f4880c..caf02a5 100644 --- a/arch/arm/mach-uniphier/init/init-ld4.c +++ b/arch/arm/mach-uniphier/init/init-ld4.c @@ -27,7 +27,7 @@ int uniphier_ld4_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); + uniphier_memconf_2ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-pro4.c b/arch/arm/mach-uniphier/init/init-pro4.c index e57eb86..32d09bb 100644 --- a/arch/arm/mach-uniphier/init/init-pro4.c +++ b/arch/arm/mach-uniphier/init/init-pro4.c @@ -24,7 +24,7 @@ int uniphier_pro4_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); + uniphier_memconf_2ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-pro5.c b/arch/arm/mach-uniphier/init/init-pro5.c index ea53dcf..3fc09a4 100644 --- a/arch/arm/mach-uniphier/init/init-pro5.c +++ b/arch/arm/mach-uniphier/init/init-pro5.c @@ -20,7 +20,7 @@ int uniphier_pro5_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); + uniphier_memconf_2ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-pxs2.c b/arch/arm/mach-uniphier/init/init-pxs2.c index 7cdf4bd..38e37e4 100644 --- a/arch/arm/mach-uniphier/init/init-pxs2.c +++ b/arch/arm/mach-uniphier/init/init-pxs2.c @@ -23,8 +23,7 @@ int uniphier_pxs2_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); - uniphier_pxs2_memconf_init(bd); + uniphier_memconf_3ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c index a2e9cc7..9dc51bf 100644 --- a/arch/arm/mach-uniphier/init/init-sld3.c +++ b/arch/arm/mach-uniphier/init/init-sld3.c @@ -26,8 +26,7 @@ int uniphier_sld3_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); - uniphier_sld3_memconf_init(bd); + uniphier_memconf_3ch_no_disbit_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/init/init-sld8.c b/arch/arm/mach-uniphier/init/init-sld8.c index 07fccb1..8e8d62b 100644 --- a/arch/arm/mach-uniphier/init/init-sld8.c +++ b/arch/arm/mach-uniphier/init/init-sld8.c @@ -27,7 +27,7 @@ int uniphier_sld8_init(const struct uniphier_board_data *bd) led_puts("L0"); - memconf_init(bd); + uniphier_memconf_2ch_init(bd); led_puts("L1"); diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c new file mode 100644 index 0000000..205ccf1 --- /dev/null +++ b/arch/arm/mach-uniphier/memconf.c @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "sg-regs.h" +#include "init.h" + +static int __uniphier_memconf_init(const struct uniphier_board_data *bd, + int have_ch2, int have_ch2_disable_bit) +{ + u32 val = 0; + unsigned long size_per_word; + + /* set up ch0 */ + switch (bd->dram_ch[0].width) { + case 16: + val |= SG_MEMCONF_CH0_NUM_1; + size_per_word = bd->dram_ch[0].size; + break; + case 32: + val |= SG_MEMCONF_CH0_NUM_2; + size_per_word = bd->dram_ch[0].size >> 1; + break; + default: + pr_err("error: unsupported DRAM ch0 width\n"); + return -EINVAL; + } + + switch (size_per_word) { + case SZ_64M: + val |= SG_MEMCONF_CH0_SZ_64M; + break; + case SZ_128M: + val |= SG_MEMCONF_CH0_SZ_128M; + break; + case SZ_256M: + val |= SG_MEMCONF_CH0_SZ_256M; + break; + case SZ_512M: + val |= SG_MEMCONF_CH0_SZ_512M; + break; + case SZ_1G: + val |= SG_MEMCONF_CH0_SZ_1G; + break; + default: + pr_err("error: unsupported DRAM ch0 size\n"); + return -EINVAL; + } + + /* set up ch1 */ + switch (bd->dram_ch[1].width) { + case 16: + val |= SG_MEMCONF_CH1_NUM_1; + size_per_word = bd->dram_ch[1].size; + break; + case 32: + val |= SG_MEMCONF_CH1_NUM_2; + size_per_word = bd->dram_ch[1].size >> 1; + break; + default: + pr_err("error: unsupported DRAM ch1 width\n"); + return -EINVAL; + } + + switch (size_per_word) { + case SZ_64M: + val |= SG_MEMCONF_CH1_SZ_64M; + break; + case SZ_128M: + val |= SG_MEMCONF_CH1_SZ_128M; + break; + case SZ_256M: + val |= SG_MEMCONF_CH1_SZ_256M; + break; + case SZ_512M: + val |= SG_MEMCONF_CH1_SZ_512M; + break; + case SZ_1G: + val |= SG_MEMCONF_CH1_SZ_1G; + break; + default: + pr_err("error: unsupported DRAM ch1 size\n"); + return -EINVAL; + } + + /* is sparse mem? */ + if (bd->dram_ch[0].base + bd->dram_ch[0].size < bd->dram_ch[1].base) + val |= SG_MEMCONF_SPARSEMEM; + + if (!have_ch2) + goto out; + + if (!bd->dram_ch[2].size) { + if (have_ch2_disable_bit) + val |= SG_MEMCONF_CH2_DISABLE; + goto out; + } + + /* set up ch2 */ + switch (bd->dram_ch[2].width) { + case 16: + val |= SG_MEMCONF_CH2_NUM_1; + size_per_word = bd->dram_ch[2].size; + break; + case 32: + val |= SG_MEMCONF_CH2_NUM_2; + size_per_word = bd->dram_ch[2].size >> 1; + break; + default: + pr_err("error: unsupported DRAM ch2 width\n"); + return -EINVAL; + } + + switch (size_per_word) { + case SZ_64M: + val |= SG_MEMCONF_CH2_SZ_64M; + break; + case SZ_128M: + val |= SG_MEMCONF_CH2_SZ_128M; + break; + case SZ_256M: + val |= SG_MEMCONF_CH2_SZ_256M; + break; + case SZ_512M: + val |= SG_MEMCONF_CH2_SZ_512M; + break; + case SZ_1G: + val |= SG_MEMCONF_CH2_SZ_1G; + break; + default: + pr_err("error: unsupported DRAM ch2 size\n"); + return -EINVAL; + } + +out: + writel(val, SG_MEMCONF); + + return 0; +} + +int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd) +{ + return __uniphier_memconf_init(bd, 0, 0); +} + +int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd) +{ + return __uniphier_memconf_init(bd, 1, 0); +} + +int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd) +{ + return __uniphier_memconf_init(bd, 1, 1); +} diff --git a/arch/arm/mach-uniphier/memconf/Makefile b/arch/arm/mach-uniphier/memconf/Makefile deleted file mode 100644 index 6ed1419..0000000 --- a/arch/arm/mach-uniphier/memconf/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += memconf.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += memconf-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += memconf-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += memconf-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += memconf-pxs2.o diff --git a/arch/arm/mach-uniphier/memconf/memconf-pxs2.c b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c deleted file mode 100644 index e98eb48..0000000 --- a/arch/arm/mach-uniphier/memconf/memconf-pxs2.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#include "../init.h" -#include "../sg-regs.h" - -int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd) -{ - u32 tmp; - unsigned long size_per_word; - - tmp = readl(SG_MEMCONF); - - tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK); - - switch (bd->dram_ch[2].width) { - case 16: - tmp |= SG_MEMCONF_CH2_NUM_1; - size_per_word = bd->dram_ch[2].size; - break; - case 32: - tmp |= SG_MEMCONF_CH2_NUM_2; - size_per_word = bd->dram_ch[2].size >> 1; - break; - default: - pr_err("error: unsupported DRAM Ch2 width\n"); - return -EINVAL; - } - - /* Set DDR size */ - switch (size_per_word) { - case SZ_64M: - tmp |= SG_MEMCONF_CH2_SZ_64M; - break; - case SZ_128M: - tmp |= SG_MEMCONF_CH2_SZ_128M; - break; - case SZ_256M: - tmp |= SG_MEMCONF_CH2_SZ_256M; - break; - case SZ_512M: - tmp |= SG_MEMCONF_CH2_SZ_512M; - break; - case SZ_1G: - tmp |= SG_MEMCONF_CH2_SZ_1G; - break; - default: - pr_err("error: unsupported DRAM Ch2 size\n"); - return -EINVAL; - } - - if (size_per_word) - tmp &= ~SG_MEMCONF_CH2_DISABLE; - else - tmp |= SG_MEMCONF_CH2_DISABLE; - - writel(tmp, SG_MEMCONF); - - return 0; -} diff --git a/arch/arm/mach-uniphier/memconf/memconf-sld3.c b/arch/arm/mach-uniphier/memconf/memconf-sld3.c deleted file mode 100644 index 948f82c..0000000 --- a/arch/arm/mach-uniphier/memconf/memconf-sld3.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#include "../init.h" -#include "../sg-regs.h" - -int uniphier_sld3_memconf_init(const struct uniphier_board_data *bd) -{ - u32 tmp; - unsigned long size_per_word; - - tmp = readl(SG_MEMCONF); - - tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK); - - switch (bd->dram_ch[2].width) { - case 16: - tmp |= SG_MEMCONF_CH2_NUM_1; - size_per_word = bd->dram_ch[2].size; - break; - case 32: - tmp |= SG_MEMCONF_CH2_NUM_2; - size_per_word = bd->dram_ch[2].size >> 1; - break; - default: - pr_err("error: unsupported DRAM Ch2 width\n"); - return -EINVAL; - } - - /* Set DDR size */ - switch (size_per_word) { - case SZ_64M: - tmp |= SG_MEMCONF_CH2_SZ_64M; - break; - case SZ_128M: - tmp |= SG_MEMCONF_CH2_SZ_128M; - break; - case SZ_256M: - tmp |= SG_MEMCONF_CH2_SZ_256M; - break; - case SZ_512M: - tmp |= SG_MEMCONF_CH2_SZ_512M; - break; - default: - pr_err("error: unsupported DRAM Ch2 size\n"); - return -EINVAL; - } - - writel(tmp, SG_MEMCONF); - - return 0; -} diff --git a/arch/arm/mach-uniphier/memconf/memconf.c b/arch/arm/mach-uniphier/memconf/memconf.c deleted file mode 100644 index e607ac9..0000000 --- a/arch/arm/mach-uniphier/memconf/memconf.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Copyright (C) 2016 Socionext Inc. - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#include "../init.h" -#include "../sg-regs.h" - -int memconf_init(const struct uniphier_board_data *bd) -{ - u32 tmp; - unsigned long size_per_word; - - tmp = readl(SG_MEMCONF); - - tmp &= ~(SG_MEMCONF_CH0_SZ_MASK | SG_MEMCONF_CH0_NUM_MASK); - - switch (bd->dram_ch[0].width) { - case 16: - tmp |= SG_MEMCONF_CH0_NUM_1; - size_per_word = bd->dram_ch[0].size; - break; - case 32: - tmp |= SG_MEMCONF_CH0_NUM_2; - size_per_word = bd->dram_ch[0].size >> 1; - break; - default: - pr_err("error: unsupported DRAM Ch0 width\n"); - return -EINVAL; - } - - /* Set DDR size */ - switch (size_per_word) { - case SZ_64M: - tmp |= SG_MEMCONF_CH0_SZ_64M; - break; - case SZ_128M: - tmp |= SG_MEMCONF_CH0_SZ_128M; - break; - case SZ_256M: - tmp |= SG_MEMCONF_CH0_SZ_256M; - break; - case SZ_512M: - tmp |= SG_MEMCONF_CH0_SZ_512M; - break; - case SZ_1G: - tmp |= SG_MEMCONF_CH0_SZ_1G; - break; - default: - pr_err("error: unsupported DRAM Ch0 size\n"); - return -EINVAL; - } - - tmp &= ~(SG_MEMCONF_CH1_SZ_MASK | SG_MEMCONF_CH1_NUM_MASK); - - switch (bd->dram_ch[1].width) { - case 16: - tmp |= SG_MEMCONF_CH1_NUM_1; - size_per_word = bd->dram_ch[1].size; - break; - case 32: - tmp |= SG_MEMCONF_CH1_NUM_2; - size_per_word = bd->dram_ch[1].size >> 1; - break; - default: - pr_err("error: unsupported DRAM Ch1 width\n"); - return -EINVAL; - } - - switch (size_per_word) { - case SZ_64M: - tmp |= SG_MEMCONF_CH1_SZ_64M; - break; - case SZ_128M: - tmp |= SG_MEMCONF_CH1_SZ_128M; - break; - case SZ_256M: - tmp |= SG_MEMCONF_CH1_SZ_256M; - break; - case SZ_512M: - tmp |= SG_MEMCONF_CH1_SZ_512M; - break; - case SZ_1G: - tmp |= SG_MEMCONF_CH1_SZ_1G; - break; - default: - pr_err("error: unsupported DRAM Ch1 size\n"); - return -EINVAL; - } - - if (bd->dram_ch[0].base + bd->dram_ch[0].size < bd->dram_ch[1].base) - tmp |= SG_MEMCONF_SPARSEMEM; - else - tmp &= ~SG_MEMCONF_SPARSEMEM; - - writel(tmp, SG_MEMCONF); - - return 0; -}