From patchwork Fri Dec 29 17:00:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 122943 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp4915245qgn; Fri, 29 Dec 2017 09:03:29 -0800 (PST) X-Google-Smtp-Source: ACJfBouPgsWdO78dmFT6L1W5yMITE989ORVP7c3TCzF+W2UR/1E+YtPNFs2i4awOGM+wqXzd7gLS X-Received: by 10.80.180.205 with SMTP id x13mr46541664edd.205.1514567009394; Fri, 29 Dec 2017 09:03:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1514567009; cv=none; d=google.com; s=arc-20160816; b=A3UpD0CPKMBNZ6N5GZeOEUw+4rXl/87ST/SFbOoO/MDE1t8IbyHzjy261F3cWHB8ZZ lLXmDgRHZ19caKDZr3tOSSws4AtUIgL/BKd2AOV5GYaZsF/LKFnlw2W/ISvbrVm9hbko kQm/okKQLEk/0QpcqylNKovzPuEkss+3+7kEk6v5qlI/k5OOXCc7t/cBcxB8iVimZgNR v8/UGuFJmVHzXCOuwAK60ILXDNjBsEQMvb8/x/EltUOL5PpXgW3/uzaaRS6NEL6v7kec qoKzPugU6wN42e85+Y9btJ1zuoqZP5luU6X3HL9asKnRBWljyUIe20iOlFVKPCVnj7Ls hUFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=GrReHSzHoDcootGqtVNQKLh2fj/uH5rhzqonQB4ALRE=; b=ArDsGOvI5cJ4S6jt4bZ1XPiJFMVfJrDuBAUEz5ThJPd3X7Y5zRhk7Cvplo2DhHkX8r vdV6ssRi/FDR+aLqfMIQtJOX3VsWfB0X/wRkJpu4I4dbrGIy6CoYFk+BoqETTqJd6f+/ nQ46G92WGq060TwFpjmO0yD22KtNLZ6TRMI74lwXhVHDCv5kRJKQ7dFaMamFcdWZIOZm sDRGcG+64+BBt7RpXU8i71E2idXh7E4pEp46YSJQow5NB7pCn0sD2q+VU/KBrVcBBA1x ZFYlDnXGoIHTZqnNeM8BuMAiiWrVNhrmXuBMsU+fPYTtkg4cWsAhDhTrx8xnswl9ffhh sT6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=utERpmwg; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id h58si621768eda.257.2017.12.29.09.03.29; Fri, 29 Dec 2017 09:03:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=utERpmwg; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id E5DB8C21DCA; Fri, 29 Dec 2017 17:01:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9421EC21DE4; Fri, 29 Dec 2017 17:00:43 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7988BC21C34; Fri, 29 Dec 2017 17:00:39 +0000 (UTC) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by lists.denx.de (Postfix) with ESMTPS id 2B12EC21D56 for ; Fri, 29 Dec 2017 17:00:37 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-08.nifty.com with ESMTP id vBTH0O9M000541; Sat, 30 Dec 2017 02:00:27 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com vBTH0O9M000541 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1514566827; bh=U734gI4tDf51x4yeJE8qlIcOfxWYIeYrAayLy49RgI8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=utERpmwgpYUute62fw97WF6OHpVMlsQFczdRIeehe7bAcGm8P63BVGbFP1/3ks8WX U9ZdcAaOf2DFMitmJSf+hghSrZg3TKx0VdNbNzc/q3olywrFhak7MbFKuQNR7DCEpE vZSGBtopKELgrEn7J8sCmRePpln5drNpT9rOrAPSECIPMEVegImjTUrAT7FJV7elFx 8WvXaESfLyLhnDRM4xjU/uO1oa65U/54EPMQGuYo12mylJUf/bR/0pQNa1sIMu976o gAF5rZ8IsqQEEOS1pi+RhIAVa3Rpdk41h5IrMkfkbZ1d0znTD8K7BYMZSv41029ORd 1Y4cezFHKWYBQ== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 30 Dec 2017 02:00:09 +0900 Message-Id: <1514566812-16781-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514566812-16781-1-git-send-email-yamada.masahiro@socionext.com> References: <1514566812-16781-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 5/8] mmc: sdhci-cadence: use bitfield access macros for cleanup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This driver is a counterpart from the one in Linux. Follow the clean-up I did in Linux. Signed-off-by: Masahiro Yamada --- drivers/mmc/sdhci-cadence.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c index 72d1c64..712b18c 100644 --- a/drivers/mmc/sdhci-cadence.c +++ b/drivers/mmc/sdhci-cadence.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -19,15 +20,14 @@ #define SDHCI_CDNS_HRS04_ACK BIT(26) #define SDHCI_CDNS_HRS04_RD BIT(25) #define SDHCI_CDNS_HRS04_WR BIT(24) -#define SDHCI_CDNS_HRS04_RDATA_SHIFT 16 -#define SDHCI_CDNS_HRS04_WDATA_SHIFT 8 -#define SDHCI_CDNS_HRS04_ADDR_SHIFT 0 +#define SDHCI_CDNS_HRS04_RDATA GENMASK(23, 16) +#define SDHCI_CDNS_HRS04_WDATA GENMASK(15, 8) +#define SDHCI_CDNS_HRS04_ADDR GENMASK(5, 0) #define SDHCI_CDNS_HRS06 0x18 /* eMMC control */ #define SDHCI_CDNS_HRS06_TUNE_UP BIT(15) -#define SDHCI_CDNS_HRS06_TUNE_SHIFT 8 -#define SDHCI_CDNS_HRS06_TUNE_MASK 0x3f -#define SDHCI_CDNS_HRS06_MODE_MASK 0x7 +#define SDHCI_CDNS_HRS06_TUNE GENMASK(13, 8) +#define SDHCI_CDNS_HRS06_MODE GENMASK(2, 0) #define SDHCI_CDNS_HRS06_MODE_SD 0x0 #define SDHCI_CDNS_HRS06_MODE_MMC_SDR 0x2 #define SDHCI_CDNS_HRS06_MODE_MMC_DDR 0x3 @@ -84,8 +84,8 @@ static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat, u32 tmp; int ret; - tmp = (data << SDHCI_CDNS_HRS04_WDATA_SHIFT) | - (addr << SDHCI_CDNS_HRS04_ADDR_SHIFT); + tmp = FIELD_PREP(SDHCI_CDNS_HRS04_WDATA, data) | + FIELD_PREP(SDHCI_CDNS_HRS04_ADDR, addr); writel(tmp, reg); tmp |= SDHCI_CDNS_HRS04_WR; @@ -152,8 +152,8 @@ static void sdhci_cdns_set_control_reg(struct sdhci_host *host) } tmp = readl(plat->hrs_addr + SDHCI_CDNS_HRS06); - tmp &= ~SDHCI_CDNS_HRS06_MODE_MASK; - tmp |= mode; + tmp &= ~SDHCI_CDNS_HRS06_MODE; + tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_MODE, mode); writel(tmp, plat->hrs_addr + SDHCI_CDNS_HRS06); }