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[81.169.180.215]) by mx.google.com with ESMTP id b95si327484edf.239.2018.01.26.04.25.39; Fri, 26 Jan 2018 04:25:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=SK4BvQ5Q; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id 556D3C224E2; Fri, 26 Jan 2018 12:25:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B803EC224DF; Fri, 26 Jan 2018 12:24:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6F136C22487; Fri, 26 Jan 2018 12:24:50 +0000 (UTC) Received: from mail-wm0-f66.google.com (mail-wm0-f66.google.com [74.125.82.66]) by lists.denx.de (Postfix) with ESMTPS id 3AD82C21DA1 for ; Fri, 26 Jan 2018 12:24:49 +0000 (UTC) Received: by mail-wm0-f66.google.com with SMTP id r71so936363wmd.1 for ; Fri, 26 Jan 2018 04:24:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4dNx/TMrG7D8yi9QXj/S16kmmumBLJq2+LV+GS99h2c=; b=SK4BvQ5QLJ7zGVYFYTISWeA7Vck3ScmQLJU+H0MefO2TO2cMWvcXe8GvY3xqI7uHDc 5WCCwxo3GiUXtcIj3ZAYNb1Ie7Jenpe9FBrP4kHGYKMHCjoUQAsTjf8uuA72HwPvXFDV NaRsxKnB10+eipbl8DkhwPMIKTaPm2dOMP4p4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4dNx/TMrG7D8yi9QXj/S16kmmumBLJq2+LV+GS99h2c=; b=n5Yw7YOVX97kh06KWo9oDUCgeTI4Mf4keO5SI7gDAEG+L48l9q8jIA8TWvxY1TqUsy lRBbe9NKsYRxcshRffys8KqyKO26aQpn89F73BHVkDkLPNTPohwGaMRIpBlAb/HG6BRF CBrNteCeiFb4J45i3e1QO2GVhb5y+JYLuYoO36CMxHlpO99h0qwkGvk00sbYG86c9ojk HiEk6KQs2u9c5QJahGOLcbOzF3c3kkn5WjNNq84R9ABQ3FLYbzgzF86oNVS6Kmyd46CQ +sDEudI7ZRZkC6xOGHaw65neQPGJ5mxgwR5kGvzqLu5V9GBItiEhtcOQl1QGsEElP6nK GaAw== X-Gm-Message-State: AKwxytdE5co4wPREw9uEiM70WHit9tfs1fdEE6ngQfPPZf5Jj6o9Ghwp MWHXaLxTx6s/kt1BZq8xDabep1O+OWo= X-Received: by 10.80.209.200 with SMTP id i8mr34732692edg.213.1516969488671; Fri, 26 Jan 2018 04:24:48 -0800 (PST) Received: from localhost.localdomain ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id 15sm2546827eds.54.2018.01.26.04.24.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 26 Jan 2018 04:24:48 -0800 (PST) From: Bryan O'Donoghue To: u-boot@lists.denx.de, trini@konsulko.com Date: Fri, 26 Jan 2018 12:24:43 +0000 Message-Id: <1516969484-19409-2-git-send-email-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516969484-19409-1-git-send-email-bryan.odonoghue@linaro.org> References: <1516969484-19409-1-git-send-email-bryan.odonoghue@linaro.org> Cc: Aneesh Bansal , fabio.estevam@nxp.com, Ruchika Gupta Subject: [U-Boot] [RESEND PATCH v3 1/2] drivers/crypto/fsl: assign job-rings to non-TrustZone X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" After enabling TrustZone various parts of the CAAM silicon become inaccessible to non TrustZone contexts. The job-ring registers are designed to allow non TrustZone contexts like Linux to still submit jobs to CAAM even after TrustZone has been enabled. The default job-ring permissions after the BootROM look like this for job-ring zero. ms=0x00008001 ls=0x00008001 The MS field is JRaMIDR_MS (job ring MID most significant). Referring to "Security Reference Manual for i.MX 7Dual and 7Solo Applications Processors, Rev. 0, 03/2017" section 8.10.4 we see that JROWN_NS controls whether or not a job-ring is accessible from non TrustZone. Bit 15 (TrustZone) is the logical inverse of bit 3 hence the above value of 0x8001 shows that JROWN_NS=0 and TrustZone=1. Clearly then as soon as TrustZone becomes active the job-ring registers are no longer accessible from Linux, which is not what we want. This patch explicitly sets all job-ring registers to JROWN_NS=1 (non TrustZone) by default and to the Non-Secure MID 001. Both settings are required to successfully assign a job-ring to non-secure mode. If a piece of TrustZone firmware requires ownership of job-ring registers it can unset the JROWN_NS bit itself. This patch in conjunction with a modification of the Linux kernel to skip HWRNG initialisation makes CAAM usable to Linux with TrustZone enabled. Signed-off-by: Bryan O'Donoghue Cc: Fabio Estevam Cc: Peng Fan Cc: Alex Porosanu Cc: Ruchika Gupta Cc: Aneesh Bansal Link: https://github.com/OP-TEE/optee_os/issues/1408 Link: https://tinyurl.com/yam5gv9a Tested-by: Lukas Auer Reviewed-by: Ruchika Gupta --- drivers/crypto/fsl/jr.c | 9 +++++++++ drivers/crypto/fsl/jr.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index a6dad01..34bd070 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -579,6 +579,8 @@ int sec_init_idx(uint8_t sec_idx) { ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); uint32_t mcr = sec_in32(&sec->mcfgr); + uint32_t jrown_ns; + int i; int ret = 0; #ifdef CONFIG_FSL_CORENET @@ -634,6 +636,13 @@ int sec_init_idx(uint8_t sec_idx) #endif #endif + /* Set ownership of job rings to non-TrustZone mode by default */ + for (i = 0; i < ARRAY_SIZE(sec->jrliodnr); i++) { + jrown_ns = sec_in32(&sec->jrliodnr[i].ms); + jrown_ns |= JROWN_NS | JRMID_NS; + sec_out32(&sec->jrliodnr[i].ms, jrown_ns); + } + ret = jr_init(sec_idx); if (ret < 0) { printf("SEC initialization failed\n"); diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index f546226..ef515e7 100644 --- a/drivers/crypto/fsl/jr.h +++ b/drivers/crypto/fsl/jr.h @@ -34,6 +34,8 @@ #define JRNSLIODN_MASK 0x0fff0000 #define JRSLIODN_SHIFT 0 #define JRSLIODN_MASK 0x00000fff +#define JROWN_NS 0x00000008 +#define JRMID_NS 0x00000001 #define JQ_DEQ_ERR -1 #define JQ_DEQ_TO_ERR -2