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[81.169.180.215]) by mx.google.com with ESMTP id k31si156795edb.284.2018.04.02.15.44.22; Mon, 02 Apr 2018 15:44:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=B7aYO7p2; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id A4AD1C21E45; Mon, 2 Apr 2018 22:42:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 345C0C21DFA; Mon, 2 Apr 2018 22:42:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 09D08C21DB3; Mon, 2 Apr 2018 22:42:20 +0000 (UTC) Received: from mail-wm0-f65.google.com (mail-wm0-f65.google.com [74.125.82.65]) by lists.denx.de (Postfix) with ESMTPS id 791A8C21CB1 for ; Mon, 2 Apr 2018 22:42:20 +0000 (UTC) Received: by mail-wm0-f65.google.com with SMTP id v21so29029969wmc.1 for ; Mon, 02 Apr 2018 15:42:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CA2atoKRAAeZaRXet7yXYeavk5dzsuMokIvwFjiBCMU=; b=B7aYO7p2qZK8jWalKoc1+N0VmvoX26LGmY9TNf9rlENhX+1pd2iHSrj2Zfvyw6jhT+ 1Hm8axaDPMhXxerpN65flWxIM9Vo7WzxWTpdFNUJOBdM9EEUoAYjNCn+sGWvB4F+/xc0 GHxNzFkedUaqXv38+y/3V6p/ZIM76nO1pQzAQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CA2atoKRAAeZaRXet7yXYeavk5dzsuMokIvwFjiBCMU=; b=a6q23GdAWy1SSYeC32Q2spG8SR3bf5wGzVghzy4QpG1uIfPoOtD9sUhK3VyFclHUUN SA9kJmgl8fABMNALkfPG4y+jezK35hFTCsbX06Dk2RkXp6dDiEv/G0KzmInB4NKMFy3J Of9fdq/5okONS8o3qnWWjAazg6gnSMiB8Hp416TdftQXEJ74/4lAlPHdhM4ETE4VdKN3 crQTYE8HvdU/dHQiHfcUW/yhZZHNr09xjt7htrJw9zYeV9b2+/J4tFsPaLTSAhpLYSlB Ya/ZYf2KEM+xp45JFAk8b8E2f2y+ssjp8VmvFig3j3m0MEkUcwEi81K+6V5ihyktcTwL vP7A== X-Gm-Message-State: AElRT7H4sVtDC5Ng5b9zOADI9l7ngLAMkv78Bad/fjnd0VeNdCB6s5XY THmK+NMB1yb7PEQG9g+tSjzvbtMOXRM= X-Received: by 10.80.164.182 with SMTP id w51mr10677424edb.152.1522708939893; Mon, 02 Apr 2018 15:42:19 -0700 (PDT) Received: from localhost.localdomain ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id s8sm842086edk.76.2018.04.02.15.42.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 Apr 2018 15:42:19 -0700 (PDT) From: Bryan O'Donoghue To: u-boot@lists.denx.de, fabio.estevam@nxp.com, sbabic@denx.de Date: Mon, 2 Apr 2018 23:42:00 +0100 Message-Id: <1522708936-7603-2-git-send-email-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522708936-7603-1-git-send-email-bryan.odonoghue@linaro.org> References: <1522708936-7603-1-git-send-email-bryan.odonoghue@linaro.org> Cc: breno.lima@nxp.com, Utkarsh Gupta , rui.silva@linaro.org, paul.liu@linaro.org Subject: [U-Boot] [PATCH v2 01/17] imximage: Specify default IVT offset in IMX image X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds BOOTROM_IVT_HDR_OFFSET at 0xC00. The BootROM expects to find the IVT header at a particular offset in an i.MX image. Defining the expected offset of the IVT header in the first-stage BootROM image format is of use of later stage authentication routines where those routines continue to follow the first-stage authentication layout. This patch defines the first stage offset which later patch make use of. Signed-off-by: Bryan O'Donoghue Cc: Utkarsh Gupta Cc: Breno Lima Cc: Fabio Estevam --- include/imximage.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/imximage.h b/include/imximage.h index 553b852..800fd63 100644 --- a/include/imximage.h +++ b/include/imximage.h @@ -14,6 +14,9 @@ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 +/* Specify the offset of the IVT in the IMX header as expected by BootROM */ +#define BOOTROM_IVT_HDR_OFFSET 0xC00 + /* * NOTE: This file must be kept in sync with arch/arm/include/asm/\ * mach-imx/imximage.cfg because tools/imximage.c can not