From patchwork Thu Jan 23 20:16:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sagar Shrikant Kadam X-Patchwork-Id: 240022 List-Id: U-Boot discussion From: sagar.kadam at sifive.com (Sagar Shrikant Kadam) Date: Thu, 23 Jan 2020 12:16:02 -0800 Subject: [U-Boot Patch v1 3/7] fu540: dtsi: spi: add num-cs info to dt In-Reply-To: <1579810566-11675-1-git-send-email-sagar.kadam@sifive.com> References: <1579810566-11675-1-git-send-email-sagar.kadam@sifive.com> Message-ID: <1579810566-11675-4-git-send-email-sagar.kadam@sifive.com> Add number of chip select information to spi nodes which can be used by spi-uclass for error handling if invlaid cs number passed from command. Signed-off-by: Sagar Shrikant Kadam --- arch/riscv/dts/fu540-c000.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/dts/fu540-c000.dtsi b/arch/riscv/dts/fu540-c000.dtsi index afa43c7..9c6ab21 100644 --- a/arch/riscv/dts/fu540-c000.dtsi +++ b/arch/riscv/dts/fu540-c000.dtsi @@ -191,6 +191,7 @@ clocks = <&prci PRCI_CLK_TLCLK>; #address-cells = <1>; #size-cells = <0>; + num-cs = <1>; status = "disabled"; }; qspi1: spi at 10041000 { @@ -202,6 +203,7 @@ clocks = <&prci PRCI_CLK_TLCLK>; #address-cells = <1>; #size-cells = <0>; + num-cs = <1>; status = "disabled"; }; qspi2: spi at 10050000 { @@ -212,6 +214,7 @@ clocks = <&prci PRCI_CLK_TLCLK>; #address-cells = <1>; #size-cells = <0>; + num-cs = <1>; status = "disabled"; }; eth0: ethernet at 10090000 {