From patchwork Mon Mar 2 08:58:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Chen X-Patchwork-Id: 243170 List-Id: U-Boot discussion From: ptchentw at gmail.com (Jun Chen) Date: Mon, 2 Mar 2020 16:58:54 +0800 Subject: [PATCH 1/4] i2c: designware_i2c: Fix IC_CON register setting for high speed mode In-Reply-To: <1583139537-65602-1-git-send-email-ptchentw@gmail.com> References: <1583139537-65602-1-git-send-email-ptchentw@gmail.com> Message-ID: <1583139537-65602-2-git-send-email-ptchentw@gmail.com> From: Jun Chen IC_CON[2:1] should be 3 for high speed mode Signed-off-by: Jun Chen Signed-off-by: Jun Chen --- drivers/i2c/designware_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index 0b5e70a..9186fcb 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -274,7 +274,7 @@ static int _dw_i2c_set_bus_speed(struct dw_i2c *priv, struct i2c_regs *i2c_base, switch (config.speed_mode) { case IC_SPEED_MODE_HIGH: - cntl |= IC_CON_SPD_SS; + cntl |= IC_CON_SPD_HS; writel(config.scl_hcnt, &i2c_base->ic_hs_scl_hcnt); writel(config.scl_lcnt, &i2c_base->ic_hs_scl_lcnt); break;