From patchwork Fri Mar 6 16:25:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe REYNES X-Patchwork-Id: 243308 List-Id: U-Boot discussion From: philippe.reynes at softathome.com (Philippe Reynes) Date: Fri, 6 Mar 2020 17:25:01 +0100 Subject: [PATCH 6/6] bcm96750ref1: add initial support In-Reply-To: <1583511901-10930-1-git-send-email-philippe.reynes@softathome.com> References: <1583511901-10930-1-git-send-email-philippe.reynes@softathome.com> Message-ID: <1583511901-10930-6-git-send-email-philippe.reynes@softathome.com> This add the initial support of the broadcom reference board bcm968360bg with a bcm68360 SoC. This board has 1 GB of RAM, 512 MB of flash (nand), 2 USB port, 1 UART, and 4 ethernet ports. Signed-off-by: Philippe Reynes --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 3 ++ arch/arm/dts/bcm96750ref1.dts | 78 ++++++++++++++++++++++++++++++ board/broadcom/bcm96750ref1/Kconfig | 16 ++++++ board/broadcom/bcm96750ref1/MAINTAINERS | 6 +++ board/broadcom/bcm96750ref1/Makefile | 3 ++ board/broadcom/bcm96750ref1/bcm96750ref1.c | 44 +++++++++++++++++ configs/bcm96750ref1_ram_defconfig | 68 ++++++++++++++++++++++++++ include/configs/broadcom_bcm96750ref1.h | 40 +++++++++++++++ 9 files changed, 259 insertions(+) create mode 100644 arch/arm/dts/bcm96750ref1.dts create mode 100644 board/broadcom/bcm96750ref1/Kconfig create mode 100644 board/broadcom/bcm96750ref1/MAINTAINERS create mode 100644 board/broadcom/bcm96750ref1/Makefile create mode 100644 board/broadcom/bcm96750ref1/bcm96750ref1.c create mode 100644 configs/bcm96750ref1_ram_defconfig create mode 100644 include/configs/broadcom_bcm96750ref1.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 568b95a..a3e9130 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1839,6 +1839,7 @@ source "board/broadcom/bcm23550_w1d/Kconfig" source "board/broadcom/bcm28155_ap/Kconfig" source "board/broadcom/bcm963158/Kconfig" source "board/broadcom/bcm968360bg/Kconfig" +source "board/broadcom/bcm96750ref1/Kconfig" source "board/broadcom/bcm968580xref/Kconfig" source "board/broadcom/bcmcygnus/Kconfig" source "board/broadcom/bcmnsp/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9c593b2..e3dcd89 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -871,6 +871,9 @@ dtb-$(CONFIG_ARCH_BCM63158) += \ dtb-$(CONFIG_ARCH_BCM68360) += \ bcm968360bg.dtb +dtb-$(CONFIG_ARCH_BCM6750) += \ + bcm96750ref1.dtb + dtb-$(CONFIG_ARCH_BCM6858) += \ bcm968580xref.dtb diff --git a/arch/arm/dts/bcm96750ref1.dts b/arch/arm/dts/bcm96750ref1.dts new file mode 100644 index 0000000..ac607b4 --- /dev/null +++ b/arch/arm/dts/bcm96750ref1.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +/dts-v1/; + +#include "bcm6750.dtsi" + +/ { + model = "Broadcom bcm6750ref1"; + compatible = "broadcom,bcm6750ref1", "brcm,bcm6750"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&nand { + status = "okay"; + write-protect = <0>; + #address-cells = <1>; + #size-cells = <0>; + + nandcs at 0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <27>; + }; +}; diff --git a/board/broadcom/bcm96750ref1/Kconfig b/board/broadcom/bcm96750ref1/Kconfig new file mode 100644 index 0000000..e76e2be --- /dev/null +++ b/board/broadcom/bcm96750ref1/Kconfig @@ -0,0 +1,16 @@ +if ARCH_BCM6750 + +config SYS_VENDOR + default "broadcom" + +config SYS_BOARD + default "bcm96750ref1" + +config SYS_CONFIG_NAME + default "broadcom_bcm96750ref1" + +endif + +config TARGET_BCM96750REF1 + bool "Support Broadcom bcm96750ref1" + depends on ARCH_BCM6750 diff --git a/board/broadcom/bcm96750ref1/MAINTAINERS b/board/broadcom/bcm96750ref1/MAINTAINERS new file mode 100644 index 0000000..e7a5c9c --- /dev/null +++ b/board/broadcom/bcm96750ref1/MAINTAINERS @@ -0,0 +1,6 @@ +BCM96750REF1 BOARD +M: Philippe Reynes +S: Maintained +F: board/broadcom/bcm96750ref1 +F: include/configs/broadcom_bcm96750ref1.h +F: configs/bcm96750ref1_ram_defconfig diff --git a/board/broadcom/bcm96750ref1/Makefile b/board/broadcom/bcm96750ref1/Makefile new file mode 100644 index 0000000..ac4ffae --- /dev/null +++ b/board/broadcom/bcm96750ref1/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += bcm96750ref1.o diff --git a/board/broadcom/bcm96750ref1/bcm96750ref1.c b/board/broadcom/bcm96750ref1/bcm96750ref1.c new file mode 100644 index 0000000..4e26cfa --- /dev/null +++ b/board/broadcom/bcm96750ref1/bcm96750ref1.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +#include +#include +#include +#include + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + printf("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} + +void enable_caches(void) +{ +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) + icache_enable(); +#endif +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) + dcache_enable(); +#endif +} diff --git a/configs/bcm96750ref1_ram_defconfig b/configs/bcm96750ref1_ram_defconfig new file mode 100644 index 0000000..714077a --- /dev/null +++ b/configs/bcm96750ref1_ram_defconfig @@ -0,0 +1,68 @@ +CONFIG_ARM=y +CONFIG_SYS_ARCH_TIMER=y +CONFIG_ARCH_BCM6750=y +CONFIG_SYS_TEXT_BASE=0x60100000 +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ARMV7_LPAE=y +CONFIG_TARGET_BCM96750REF1=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y +CONFIG_FIT_CIPHER=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SILENT_CONSOLE=y +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_HUSH_PARSER=y +# CONFIG_AUTOBOOT is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +# CONFIG_CMD_MISC is not set +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set +CONFIG_DEFAULT_DEVICE_TREE="bcm96750ref1" +# CONFIG_NET is not set +CONFIG_CLK=y +CONFIG_BCM6345_GPIO=y +# CONFIG_INPUT is not set +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6750=y +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_PL01X_SERIAL=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_WDT_BCM6345=y +CONFIG_REGEX=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/broadcom_bcm96750ref1.h b/include/configs/broadcom_bcm96750ref1.h new file mode 100644 index 0000000..fde4a5b --- /dev/null +++ b/include/configs/broadcom_bcm96750ref1.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 Philippe Reynes + */ + +#include + +/* + * common + */ + +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 500000, 1500000 } +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 24 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) + +/* + * 6750 + */ + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +/* U-Boot */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE + +#define CONFIG_SKIP_LOWLEVEL_INIT + +#ifdef CONFIG_MTD_RAW_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#endif /* CONFIG_MTD_RAW_NAND */ + +/* + * 96750ref1 + */