From patchwork Sat Mar 28 14:25:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 244463 List-Id: U-Boot discussion From: bmeng.cn at gmail.com (Bin Meng) Date: Sat, 28 Mar 2020 07:25:29 -0700 Subject: [PATCH v2 5/5] azure/gitlab/travis: Add RISC-V SPL testing In-Reply-To: <1585405529-21397-1-git-send-email-bmeng.cn@gmail.com> References: <1585405529-21397-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1585405529-21397-6-git-send-email-bmeng.cn@gmail.com> This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64, we test SPL running in M-mode and U-Boot proper running in S-mode, with a 4-core SMP configuration. Signed-off-by: Bin Meng --- Changes in v2: - Update travis to add RISC-V SPL testing .azure-pipelines.yml | 16 ++++++++++++++++ .gitlab-ci.yml | 24 ++++++++++++++++++++++++ .travis.yml | 22 ++++++++++++++++++++++ 3 files changed, 62 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 99a93cc..fc4836c 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -223,6 +223,14 @@ jobs: TEST_PY_BD: "qemu-riscv64" TEST_PY_TEST_SPEC: "not sleep" BUILDMAN: "^qemu-riscv64$" + qemu_riscv32_spl: + TEST_PY_BD: "qemu-riscv32_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv32_spl$" + qemu_riscv64_spl: + TEST_PY_BD: "qemu-riscv64_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv64_spl$" qemu_x86: TEST_PY_BD: "qemu-x86" TEST_PY_TEST_SPEC: "not sleep" @@ -270,6 +278,14 @@ jobs: cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi cp /opt/grub/grubaa64.efi ~/grub_arm64.efi cp /opt/grub/grubarm.efi ~/grub_arm.efi + if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi + if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi # the below corresponds to .gitlab-ci.yml "script" cd ${WORK_DIR} if [[ "${BUILDMAN}" != "" ]]; then diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 39437ce..6b7aa33 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -24,6 +24,14 @@ stages: - cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi - cp /opt/grub/grubarm.efi ~/grub_arm.efi + - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi + - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi after_script: - rm -rf /tmp/uboot-test-hooks /tmp/venv @@ -313,6 +321,22 @@ qemu-riscv64 test.py: BUILDMAN: "^qemu-riscv64$" <<: *buildman_and_testpy_dfn +qemu-riscv32_spl test.py: + tags: [ 'all' ] + variables: + TEST_PY_BD: "qemu-riscv32_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv32_spl$" + <<: *buildman_and_testpy_dfn + +qemu-riscv64_spl test.py: + tags: [ 'all' ] + variables: + TEST_PY_BD: "qemu-riscv64_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv64_spl$" + <<: *buildman_and_testpy_dfn + qemu-x86 test.py: tags: [ 'all' ] variables: diff --git a/.travis.yml b/.travis.yml index 3226c0e..fddaee8 100644 --- a/.travis.yml +++ b/.travis.yml @@ -191,6 +191,14 @@ before_script: true && popd; fi + - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi + - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi script: # Comments must be outside the command strings below, or the Travis parser @@ -585,6 +593,20 @@ matrix: QEMU_TARGET="riscv64-softmmu" BUILDMAN="^qemu-riscv64$" TOOLCHAIN="riscv" + - name: "test/py qemu-riscv32_spl" + env: + - TEST_PY_BD="qemu-riscv32_spl" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="riscv32-softmmu" + BUILDMAN="^qemu-riscv32_spl$" + TOOLCHAIN="riscv" + - name: "test/py qemu-riscv64_spl" + env: + - TEST_PY_BD="qemu-riscv64_spl" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="riscv64-softmmu" + BUILDMAN="^qemu-riscv64_spl$" + TOOLCHAIN="riscv" - name: "test/py qemu-x86" env: - TEST_PY_BD="qemu-x86"