From patchwork Mon Jan 6 14:26:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 239171 List-Id: U-Boot discussion From: festevam at gmail.com (Fabio Estevam) Date: Mon, 6 Jan 2020 11:26:06 -0300 Subject: [PATCH] mx6ul_14x14_evk: Fix SPL hang Message-ID: <20200106142606.28339-1-festevam@gmail.com> Currently the following SPL hang is observed: U-Boot SPL 2020.01-rc5-00079-g797eee36a1 (Jan 06 2020 - 11:24:09 -0300) Trying to boot from MMC1 Card did not respond to voltage select! spl: mmc init failed with error: -95 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Fix it by moving the eSDHC1 initialization to SPL. While at it, since this board uses DM_MMC all the esdhc board code can be removed. Signed-off-by: Fabio Estevam --- Hi, Still get the following "no card present" error in U-Boot proper: MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... MMC: no card present *** Warning - No block device, using default environment but this should be treated separately. .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 175 ++---------------- 1 file changed, 20 insertions(+), 155 deletions(-) diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 898da34729..086e0e6739 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -36,14 +36,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_DAT3_CD_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ @@ -112,67 +104,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), }; -static iomux_v3_cfg_t const usdhc1_pads[] = { - MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - - /* VSELECT */ - MX6_PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL), - /* CD */ - MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* RST_B */ - MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -/* - * mx6ul_14x14_evk board default supports sd card. If want to use - * EMMC, need to do board rework for sd2. - * Introduce CONFIG_MX6UL_14X14_EVK_EMMC_REWORK, if sd2 reworked to support - * emmc, need to define this macro. - */ -#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) -static iomux_v3_cfg_t const usdhc2_emmc_pads[] = { - MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - - /* - * RST_B - */ - MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; -#else -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -/* - * The evk board uses DAT3 to detect CD card plugin, - * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. - */ -static iomux_v3_cfg_t const usdhc2_cd_pad = - MX6_PAD_NAND_DATA03__GPIO4_IO05 | MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL); - -static iomux_v3_cfg_t const usdhc2_dat3_pad = - MX6_PAD_NAND_DATA03__USDHC2_DATA3 | - MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL); -#endif static void setup_iomux_uart(void) { @@ -189,101 +120,35 @@ static int board_qspi_init(void) } #endif -#ifdef CONFIG_FSL_ESDHC_IMX -static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC1_BASE_ADDR, 0, 4}, -#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) - {USDHC2_BASE_ADDR, 0, 8}, -#else - {USDHC2_BASE_ADDR, 0, 4}, -#endif +#ifdef CONFIG_SPL_BUILD + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) -#define USDHC1_PWR_GPIO IMX_GPIO_NR(1, 9) -#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5) -#define USDHC2_PWR_GPIO IMX_GPIO_NR(4, 10) +static struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC2_BASE_ADDR, 0, 4}, +}; int board_mmc_getcd(struct mmc *mmc) { - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - case USDHC2_BASE_ADDR: -#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) - ret = 1; -#else - imx_iomux_v3_setup_pad(usdhc2_cd_pad); - gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); - gpio_direction_input(USDHC2_CD_GPIO); - - /* - * Since it is the DAT3 pin, this pin is pulled to - * low voltage if no card - */ - ret = gpio_get_value(USDHC2_CD_GPIO); - - imx_iomux_v3_setup_pad(usdhc2_dat3_pad); -#endif - break; - } - - return ret; + return 1; } int board_mmc_init(bd_t *bis) { - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-Boot device node) (Physical Port) - * mmc0 USDHC1 - * mmc1 USDHC2 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); - gpio_request(USDHC1_CD_GPIO, "usdhc1 cd"); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - - gpio_direction_output(USDHC1_PWR_GPIO, 0); - udelay(500); - gpio_direction_output(USDHC1_PWR_GPIO, 1); - break; - case 1: -#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) - imx_iomux_v3_setup_multiple_pads( - usdhc2_emmc_pads, ARRAY_SIZE(usdhc2_emmc_pads)); -#else - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); -#endif - gpio_request(USDHC2_PWR_GPIO, "usdhc2 pwr"); - gpio_direction_output(USDHC2_PWR_GPIO, 0); - udelay(500); - gpio_direction_output(USDHC2_PWR_GPIO, 1); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers (%d) than supported by the board\n", i + 1); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - return 0; + imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } #endif