From patchwork Mon Jan 27 05:06:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 240219 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Sun, 26 Jan 2020 22:06:16 -0700 Subject: [PATCH 069/108] x86: apl: Correct PCIE_ECAM_BASE In-Reply-To: <20200127050655.170614-1-sjg@chromium.org> References: <20200127050655.170614-1-sjg@chromium.org> Message-ID: <20200126220508.69.I6f15c116cfec682dce106c6c30c2325846f6c232@changeid> This value is incorrect and causes problems booting Linux. Fix it. Signed-off-by: Simon Glass --- board/google/chromebook_coral/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/google/chromebook_coral/Kconfig b/board/google/chromebook_coral/Kconfig index 940bee89b0..f744b4c00c 100644 --- a/board/google/chromebook_coral/Kconfig +++ b/board/google/chromebook_coral/Kconfig @@ -22,7 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_16384 config PCIE_ECAM_BASE - default 0xf0000000 + default 0xe0000000 config EARLY_POST_CROS_EC bool "Enable early post to Chrome OS EC"