@@ -9,6 +9,27 @@
#include <dt-bindings/phy/phy.h>
&cbass_main {
+ msmc_ram: sram at 70000000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x70000000 0x0 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x70000000 0x200000>;
+ u-boot,dm-spl;
+
+ atf-sram at 0 {
+ reg = <0x0 0x20000>;
+ };
+
+ sysfw-sram at f0000 {
+ reg = <0xf0000 0x10000>;
+ };
+
+ l3cache-sram at 100000 {
+ reg = <0x100000 0x100000>;
+ };
+ };
+
gic500: interrupt-controller at 1800000 {
compatible = "arm,gic-v3";
#address-cells = <2>;
@@ -79,7 +79,9 @@
<0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
<0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
<0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
- <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>;
+ <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
+ <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>,
+ <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>;
cbass_mcu: interconnect at 28380000 {
compatible = "simple-bus";
Add msmc_ram node needed for prueth Signed-off-by: Keerthy <j-keerthy at ti.com> --- Changes in v2: * Aligned trailing 0s for consistency. arch/arm/dts/k3-am65-main.dtsi | 21 +++++++++++++++++++++ arch/arm/dts/k3-am65.dtsi | 4 +++- 2 files changed, 24 insertions(+), 1 deletion(-)