From patchwork Wed Feb 26 12:56:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 236877 List-Id: U-Boot discussion From: p.yadav at ti.com (Pratyush Yadav) Date: Wed, 26 Feb 2020 18:26:03 +0530 Subject: [PATCH 13/15] mtd: spi-nor-core: Use Read SR dummy cycle and address width from SFDP In-Reply-To: <20200226125606.22684-1-p.yadav@ti.com> References: <20200226125606.22684-1-p.yadav@ti.com> Message-ID: <20200226125606.22684-14-p.yadav@ti.com> The xSPI Profile 1.0 table specifies how many dummy cycles and address bytes are needed for the Read Status Register command in octal DTR mode. Use that information to send the correct Read SR command. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi/spi-nor-core.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 0d3ab44a41..6802fb625b 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -340,8 +340,16 @@ static int read_sr(struct spi_nor *nor) { int ret; u8 val; + u8 addr_nbytes = nor->rdsr_addr_nbytes; + u8 dummy = nor->rdsr_dummy; + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 1), + SPI_MEM_OP_ADDR(addr_nbytes, 0, 1), + SPI_MEM_OP_DUMMY(dummy, 1), + SPI_MEM_OP_DATA_IN(1, NULL, 1)); - ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); + spi_nor_setup_op(nor, &op, nor->reg_proto); + + ret = spi_nor_read_write_reg(nor, &op, &val); if (ret < 0) { pr_debug("error %d reading SR\n", (int)ret); return ret;