From patchwork Fri Feb 28 21:05:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 237011 List-Id: U-Boot discussion From: seanga2 at gmail.com (Sean Anderson) Date: Fri, 28 Feb 2020 16:05:41 -0500 Subject: [PATCH v5 23/33] spi: dw: Properly set rx_end when not recieving In-Reply-To: <20200228210552.615672-1-seanga2@gmail.com> References: <20200228210552.615672-1-seanga2@gmail.com> Message-ID: <20200228210552.615672-24-seanga2@gmail.com> The difference between rx and rx_end is used by tx_max when calculating how much to write. If we aren't reading anything, this could cause us to let the tx fifo bottom out. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/spi/designware_spi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 613eb0d0e6..b80e99ee7f 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -427,7 +427,8 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen, priv->tx = (void *)tx; priv->tx_end = priv->tx + priv->len; priv->rx = rx; - priv->rx_end = priv->rx + priv->len; + /* If we aren't recieving, rx_end needs to be valid for tx_max() */ + priv->rx_end = priv->rx + (rx ? priv->len : 0); /* Disable controller before writing control registers */ spi_enable_chip(priv, 0);