From patchwork Mon Mar 9 03:44:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 243376 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Sun, 8 Mar 2020 21:44:26 -0600 Subject: [PATCH v2 02/39] spi: Add SPI mode enums In-Reply-To: <20200309034504.149659-1-sjg@chromium.org> References: <20200309034504.149659-1-sjg@chromium.org> Message-ID: <20200308214442.v2.2.I83a459a3914c56ca81dcdfa7e01d83c54f7ab914@changeid> With ACPI we need to describe the settings of the SPI bus. Add enums to handle this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- Changes in v2: - Don't bracket the definitions with DM_SPI include/spi.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/include/spi.h b/include/spi.h index 852f570eaa..2092940f4c 100644 --- a/include/spi.h +++ b/include/spi.h @@ -66,6 +66,39 @@ struct dm_spi_slave_platdata { #endif /* CONFIG_DM_SPI */ +/** + * enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA) + * + * @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase + * @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase + */ +enum spi_clock_phase { + SPI_CLOCK_PHASE_FIRST, + SPI_CLOCK_PHASE_SECOND +}; + +/** + * enum spi_wire_mode - indicates the number of wires used for SPI + * + * @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO + * @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO + */ +enum spi_wire_mode { + SPI_4_WIRE_MODE, + SPI_3_WIRE_MODE +}; + +/** + * enum spi_polarity - indicates the polarity of the SPI bus (CPOL) + * + * @SPI_POLARITY_LOW: Clock is low in idle state + * @SPI_POLARITY_HIGH: Clock is high in idle state + */ +enum spi_polarity { + SPI_POLARITY_LOW, + SPI_POLARITY_HIGH +}; + /** * struct spi_slave - Representation of a SPI slave *