From patchwork Mon Mar 30 15:45:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 244553 List-Id: U-Boot discussion From: p.yadav at ti.com (Pratyush Yadav) Date: Mon, 30 Mar 2020 21:15:45 +0530 Subject: [PATCH v3 12/17] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode In-Reply-To: <20200330154550.21179-1-p.yadav@ti.com> References: <20200330154550.21179-1-p.yadav@ti.com> Message-ID: <20200330154550.21179-13-p.yadav@ti.com> The xSPI Profile 1.0 table specifies how many dummy cycles and address bytes are needed for the Read Status Register command in Octal DTR mode. Use that information to send the correct Read SR command. Some controllers might have trouble reading just 1 byte in DTR mode. So, when we are in DTR mode read 2 bytes and discard the second. This shows no side effects with the two flashes I tested: Micron mt35xu512aba and Cypress s28hs512t. Update Read FSR to mimic Read SR because they share the same characteristics. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi/spi-nor-core.c | 43 +++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ab9bdee43b..9361b5c121 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -367,15 +367,30 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, static int read_sr(struct spi_nor *nor) { int ret; - u8 val; + u8 val[2]; + u8 addr_nbytes = nor->rdsr_addr_nbytes; + u8 dummy = nor->rdsr_dummy; + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 1), + SPI_MEM_OP_ADDR(addr_nbytes, 0, 1), + SPI_MEM_OP_DUMMY(dummy, 1), + SPI_MEM_OP_DATA_IN(1, NULL, 1)); + + spi_nor_setup_op(nor, &op, nor->reg_proto); - ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); + /* + * We don't want to read only one byte in DTR mode. So, read 2 and then + * discard the second byte. + */ + if (spi_nor_protocol_is_dtr(nor->reg_proto)) + op.data.nbytes = 2; + + ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) { pr_debug("error %d reading SR\n", (int)ret); return ret; } - return val; + return *val; } /* @@ -386,15 +401,31 @@ static int read_sr(struct spi_nor *nor) static int read_fsr(struct spi_nor *nor) { int ret; - u8 val; + u8 val[2]; + u8 addr_nbytes = nor->rdsr_addr_nbytes; + u8 dummy = nor->rdsr_dummy; - ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1); + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 1), + SPI_MEM_OP_ADDR(addr_nbytes, 0, 1), + SPI_MEM_OP_DUMMY(dummy, 1), + SPI_MEM_OP_DATA_IN(1, NULL, 1)); + + spi_nor_setup_op(nor, &op, nor->reg_proto); + + /* + * We don't want to read only one byte in DTR mode. So, read 2 and then + * discard the second byte. + */ + if (spi_nor_protocol_is_dtr(nor->reg_proto)) + op.data.nbytes = 2; + + ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) { pr_debug("error %d reading FSR\n", ret); return ret; } - return val; + return *val; } /*