From patchwork Fri Apr 10 11:04:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 237628 List-Id: U-Boot discussion From: sr at denx.de (Stefan Roese) Date: Fri, 10 Apr 2020 13:04:31 +0200 Subject: [RFC PATCH 3/3] mips: spl: Flush cache before jumping to U-Boot proper In-Reply-To: <20200410110431.12256-1-sr@denx.de> References: <20200410110431.12256-1-sr@denx.de> Message-ID: <20200410110431.12256-3-sr@denx.de> This patch adds a MIPS specific jump_to_image_no_args() implementation, which flushes the U-Boot proper image loaded from the boot device in SPL before jumping to it. It has been noticed on MT76x8, that this cache flush is needed. Other MIPS platforms might need it as well. Signed-off-by: Stefan Roese Cc: Weijie Gao Cc: Daniel Schwierzeck Cc: Simon Goldschmidt --- arch/mips/lib/boot.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/mips/lib/boot.c b/arch/mips/lib/boot.c index db862f6379..bc620abd9b 100644 --- a/arch/mips/lib/boot.c +++ b/arch/mips/lib/boot.c @@ -6,6 +6,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -21,3 +22,16 @@ unsigned long do_go_exec(ulong (*entry)(int, char * const []), return entry(argc, argv); } + +void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +{ + typedef void __noreturn (*image_entry_noargs_t)(void); + image_entry_noargs_t image_entry = + (image_entry_noargs_t)spl_image->entry_point; + + /* Flush cache before jumping to application */ + flush_cache((unsigned long)spl_image->load_addr, spl_image->size); + + debug("image entry point: 0x%lx\n", spl_image->entry_point); + image_entry(); +}