| Message ID | 20200527125849.165241-2-sjg@chromium.org |
|---|---|
| State | Accepted |
| Commit | 8e2922e357fe0157593063d46f8e9bd2c25a00e0 |
| Headers | show |
| Series | x86: Correct SPI memory-mapping query | expand |
On Wed, May 27, 2020 at 8:58 PM Simon Glass <sjg at chromium.org> wrote: > > At present the PCI BDF (bus/device/function) is needed to access the SPI > mapping, since the registers are at BAR0. This doesn't work when PCI > auto-config has not been done yet, since BARs are unassigned. > > Add another way to find the mapping, using the MMIO base, if the caller > knows this. > > Also add a missing function comment. > > Signed-off-by: Simon Glass <sjg at chromium.org> > --- > > Changes in v2: None > > arch/x86/cpu/intel_common/fast_spi.c | 19 ++++++++++++++----- > arch/x86/include/asm/fast_spi.h | 19 +++++++++++++++++++ > 2 files changed, 33 insertions(+), 5 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
On Thu, May 28, 2020 at 3:36 PM Bin Meng <bmeng.cn at gmail.com> wrote: > > On Wed, May 27, 2020 at 8:58 PM Simon Glass <sjg at chromium.org> wrote: > > > > At present the PCI BDF (bus/device/function) is needed to access the SPI > > mapping, since the registers are at BAR0. This doesn't work when PCI > > auto-config has not been done yet, since BARs are unassigned. > > > > Add another way to find the mapping, using the MMIO base, if the caller > > knows this. > > > > Also add a missing function comment. > > > > Signed-off-by: Simon Glass <sjg at chromium.org> > > --- > > > > Changes in v2: None > > > > arch/x86/cpu/intel_common/fast_spi.c | 19 ++++++++++++++----- > > arch/x86/include/asm/fast_spi.h | 19 +++++++++++++++++++ > > 2 files changed, 33 insertions(+), 5 deletions(-) > > > > Reviewed-by: Bin Meng <bmeng.cn at gmail.com> applied to u-boot-x86, thanks!
diff --git a/arch/x86/cpu/intel_common/fast_spi.c b/arch/x86/cpu/intel_common/fast_spi.c index a6e3d0a5bf..5d3944dee2 100644 --- a/arch/x86/cpu/intel_common/fast_spi.c +++ b/arch/x86/cpu/intel_common/fast_spi.c @@ -31,21 +31,30 @@ static ulong fast_spi_get_bios_region(struct fast_spi_regs *regs, return bios_start; } +int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep, + uint *map_sizep, uint *offsetp) +{ + ulong base; + + base = fast_spi_get_bios_region(regs, map_sizep); + *map_basep = (u32)-*map_sizep - base; + *offsetp = base; + + return 0; +} + int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep, uint *offsetp) { struct fast_spi_regs *regs; - ulong bar, base, mmio_base; + ulong bar, mmio_base; /* Special case to find mapping without probing the device */ pci_x86_read_config(pdev, PCI_BASE_ADDRESS_0, &bar, PCI_SIZE_32); mmio_base = bar & PCI_BASE_ADDRESS_MEM_MASK; regs = (struct fast_spi_regs *)mmio_base; - base = fast_spi_get_bios_region(regs, map_sizep); - *map_basep = (u32)-*map_sizep - base; - *offsetp = base; - return 0; + return fast_spi_get_bios_mmap_regs(regs, map_basep, map_sizep, offsetp); } int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base) diff --git a/arch/x86/include/asm/fast_spi.h b/arch/x86/include/asm/fast_spi.h index 47c1da80d7..7a81d4f05c 100644 --- a/arch/x86/include/asm/fast_spi.h +++ b/arch/x86/include/asm/fast_spi.h @@ -64,6 +64,25 @@ check_member(fast_spi_regs, ptdata, 0xd0); int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep, uint *offsetp); +/** + * fast_spi_get_bios_mmap_regs() - Get memory map for SPI flash given regs + * + * @regs: SPI registers to use + * @map_basep: Returns base memory address for mapped SPI + * @map_sizep: Returns size of mapped SPI + * @offsetp: Returns start offset of SPI flash where the map works + * correctly (offsets before this are not visible) + * @return 0 (always) + */ +int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep, + uint *map_sizep, uint *offsetp); + +/** + * fast_spi_early_init() - Set up a BAR to use SPI early in U-Boot + * + * @pdev: PCI device to use (this is the Fast SPI device) + * @mmio_base: MMIO base to use to access registers + */ int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base); #endif /* ASM_FAST_SPI_H */
At present the PCI BDF (bus/device/function) is needed to access the SPI mapping, since the registers are at BAR0. This doesn't work when PCI auto-config has not been done yet, since BARs are unassigned. Add another way to find the mapping, using the MMIO base, if the caller knows this. Also add a missing function comment. Signed-off-by: Simon Glass <sjg at chromium.org> --- Changes in v2: None arch/x86/cpu/intel_common/fast_spi.c | 19 ++++++++++++++----- arch/x86/include/asm/fast_spi.h | 19 +++++++++++++++++++ 2 files changed, 33 insertions(+), 5 deletions(-)