From patchwork Wed May 27 18:04:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heinrich Schuchardt X-Patchwork-Id: 246762 List-Id: U-Boot discussion From: xypron.glpk at gmx.de (Heinrich Schuchardt) Date: Wed, 27 May 2020 20:04:24 +0200 Subject: [PATCH 4/4] arm: use correct argument size of special registers In-Reply-To: <20200527180424.39395-1-xypron.glpk@gmx.de> References: <20200527180424.39395-1-xypron.glpk@gmx.de> Message-ID: <20200527180424.39395-5-xypron.glpk@gmx.de> Compiling with clang on ARMv8 shows errors like: ./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w" asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc"); ^~ %w0 These errors are due to using an incorrect size for the variables used for writing to and reading from special registers which have 64 bits on ARMv8. Mask off reserved bits when reading the exception level. Signed-off-by: Heinrich Schuchardt --- arch/arm/include/asm/system.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) -- 2.26.2 diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 1e3f574403..952057d8ca 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -133,14 +133,16 @@ enum dcache_option { static inline unsigned int current_el(void) { - unsigned int el; + unsigned long el; + asm volatile("mrs %0, CurrentEL" : "=r" (el) : : "cc"); - return el >> 2; + return 3 & (el >> 2); } static inline unsigned int get_sctlr(void) { - unsigned int el, val; + unsigned int el; + unsigned long val; el = current_el(); if (el == 1) @@ -153,7 +155,7 @@ static inline unsigned int get_sctlr(void) return val; } -static inline void set_sctlr(unsigned int val) +static inline void set_sctlr(unsigned long val) { unsigned int el;