From patchwork Sat Jun 13 13:54:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 242221 List-Id: U-Boot discussion From: jagan at amarulasolutions.com (Jagan Teki) Date: Sat, 13 Jun 2020 19:24:43 +0530 Subject: [PATCH 04/16] arm: Remove mx51evk board In-Reply-To: <20200613135455.181483-1-jagan@amarulasolutions.com> References: <20200613135455.181483-1-jagan@amarulasolutions.com> Message-ID: <20200613135455.181483-5-jagan@amarulasolutions.com> OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Patch-cc: Stefano Babic Signed-off-by: Jagan Teki --- arch/arm/mach-imx/mx5/Kconfig | 6 - board/freescale/mx51evk/Kconfig | 15 - board/freescale/mx51evk/MAINTAINERS | 6 - board/freescale/mx51evk/Makefile | 8 - board/freescale/mx51evk/imximage.cfg | 108 ------- board/freescale/mx51evk/mx51evk.c | 401 ------------------------ board/freescale/mx51evk/mx51evk_video.c | 98 ------ configs/mx51evk_defconfig | 42 --- include/configs/mx51evk.h | 197 ------------ 9 files changed, 881 deletions(-) delete mode 100644 board/freescale/mx51evk/Kconfig delete mode 100644 board/freescale/mx51evk/MAINTAINERS delete mode 100644 board/freescale/mx51evk/Makefile delete mode 100644 board/freescale/mx51evk/imximage.cfg delete mode 100644 board/freescale/mx51evk/mx51evk.c delete mode 100644 board/freescale/mx51evk/mx51evk_video.c delete mode 100644 configs/mx51evk_defconfig delete mode 100644 include/configs/mx51evk.h diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index bde37bb97e..dd21aea342 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -39,11 +39,6 @@ config TARGET_M53MENLO select MX53 select SUPPORT_SPL -config TARGET_MX51EVK - bool "Support mx51evk" - select BOARD_LATE_INIT - select MX51 - config TARGET_MX53ARD bool "Support mx53ard" select MX53 @@ -90,7 +85,6 @@ config SYS_SOC default "mx5" source "board/beckhoff/mx53cx9020/Kconfig" -source "board/freescale/mx51evk/Kconfig" source "board/freescale/mx53ard/Kconfig" source "board/freescale/mx53evk/Kconfig" source "board/freescale/mx53loco/Kconfig" diff --git a/board/freescale/mx51evk/Kconfig b/board/freescale/mx51evk/Kconfig deleted file mode 100644 index f9b69cbd66..0000000000 --- a/board/freescale/mx51evk/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_MX51EVK - -config SYS_BOARD - default "mx51evk" - -config SYS_VENDOR - default "freescale" - -config SYS_SOC - default "mx5" - -config SYS_CONFIG_NAME - default "mx51evk" - -endif diff --git a/board/freescale/mx51evk/MAINTAINERS b/board/freescale/mx51evk/MAINTAINERS deleted file mode 100644 index 0e5f22c26b..0000000000 --- a/board/freescale/mx51evk/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MX51EVK BOARD -M: Stefano Babic -S: Maintained -F: board/freescale/mx51evk/ -F: include/configs/mx51evk.h -F: configs/mx51evk_defconfig diff --git a/board/freescale/mx51evk/Makefile b/board/freescale/mx51evk/Makefile deleted file mode 100644 index 1a9581cabf..0000000000 --- a/board/freescale/mx51evk/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2007, Guennadi Liakhovetski -# -# (C) Copyright 2009 Freescale Semiconductor, Inc. - -obj-y += mx51evk.o -obj-$(CONFIG_VIDEO) += mx51evk_video.o diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg deleted file mode 100644 index ff2ec4aa27..0000000000 --- a/board/freescale/mx51evk/imximage.cfg +++ /dev/null @@ -1,108 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C Copyright 2009 - * Stefano Babic DENX Software Engineering sbabic at denx.de. - * - * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM spi - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -/* Setting IOMUXC */ -DATA 4 0x73FA88a0 0x200 -DATA 4 0x73FA850c 0x20c5 -DATA 4 0x73FA8510 0x20c5 -DATA 4 0x73FA883c 0x2 -DATA 4 0x73FA8848 0x2 -DATA 4 0x73FA84b8 0xe7 -DATA 4 0x73FA84bc 0x45 -DATA 4 0x73FA84c0 0x45 -DATA 4 0x73FA84c4 0x45 -DATA 4 0x73FA84c8 0x45 -DATA 4 0x73FA8820 0x0 -DATA 4 0x73FA84a4 0x3 -DATA 4 0x73FA84a8 0x3 -DATA 4 0x73FA84ac 0xe3 -DATA 4 0x73FA84b0 0xe3 -DATA 4 0x73FA84b4 0xe3 -DATA 4 0x73FA84cc 0xe3 -DATA 4 0x73FA84d0 0xe2 - -DATA 4 0x73FA882c 0x6 -DATA 4 0x73FA88a4 0x6 -DATA 4 0x73FA88ac 0x6 -DATA 4 0x73FA88b8 0x6 - -/* - * Setting DDR for micron - * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model - * CAS=3 BL=4 - */ -/* ESDCTL_ESDCTL0 */ -DATA 4 0x83FD9000 0x82a20000 -/* ESDCTL_ESDCTL1 */ -DATA 4 0x83FD9008 0x82a20000 -/* ESDCTL_ESDMISC */ -DATA 4 0x83FD9010 0x000ad0d0 -/* ESDCTL_ESDCFG0 */ -DATA 4 0x83FD9004 0x333574aa -/* ESDCTL_ESDCFG1 */ -DATA 4 0x83FD900C 0x333574aa - -/* Init DRAM on CS0 */ -/* ESDCTL_ESDSCR */ -DATA 4 0x83FD9014 0x04008008 -DATA 4 0x83FD9014 0x0000801a -DATA 4 0x83FD9014 0x0000801b -DATA 4 0x83FD9014 0x00448019 -DATA 4 0x83FD9014 0x07328018 -DATA 4 0x83FD9014 0x04008008 -DATA 4 0x83FD9014 0x00008010 -DATA 4 0x83FD9014 0x00008010 -DATA 4 0x83FD9014 0x06328018 -DATA 4 0x83FD9014 0x03808019 -DATA 4 0x83FD9014 0x00408019 -DATA 4 0x83FD9014 0x00008000 - -/* Init DRAM on CS1 */ -DATA 4 0x83FD9014 0x0400800c -DATA 4 0x83FD9014 0x0000801e -DATA 4 0x83FD9014 0x0000801f -DATA 4 0x83FD9014 0x0000801d -DATA 4 0x83FD9014 0x0732801c -DATA 4 0x83FD9014 0x0400800c -DATA 4 0x83FD9014 0x00008014 -DATA 4 0x83FD9014 0x00008014 -DATA 4 0x83FD9014 0x0632801c -DATA 4 0x83FD9014 0x0380801d -DATA 4 0x83FD9014 0x0040801d -DATA 4 0x83FD9014 0x00008004 - -/* Write to CTL0 */ -DATA 4 0x83FD9000 0xb2a20000 -/* Write to CTL1 */ -DATA 4 0x83FD9008 0xb2a20000 -/* ESDMISC */ -DATA 4 0x83FD9010 0x000ad6d0 -/* ESDCTL_ESDCDLYGD */ -DATA 4 0x83FD9034 0x90000000 -DATA 4 0x83FD9014 0x00000000 diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c deleted file mode 100644 index 46037acc0e..0000000000 --- a/board/freescale/mx51evk/mx51evk.c +++ /dev/null @@ -1,401 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg esdhc_cfg[2] = { - {MMC_SDHC1_BASE_ADDR}, - {MMC_SDHC2_BASE_ADDR}, -}; -#endif - -int dram_init(void) -{ - /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, - PHYS_SDRAM_1_SIZE); - return 0; -} - -u32 get_board_rev(void) -{ - u32 rev = get_cpu_rev(); - if (!gpio_get_value(IMX_GPIO_NR(1, 22))) - rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET; - return rev; -} - -#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH) - -static void setup_iomux_uart(void) -{ - static const iomux_v3_cfg_t uart_pads[] = { - MX51_PAD_UART1_RXD__UART1_RXD, - MX51_PAD_UART1_TXD__UART1_TXD, - NEW_PAD_CTRL(MX51_PAD_UART1_RTS__UART1_RTS, UART_PAD_CTRL), - NEW_PAD_CTRL(MX51_PAD_UART1_CTS__UART1_CTS, UART_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -} - -static void setup_iomux_fec(void) -{ - static const iomux_v3_cfg_t fec_pads[] = { - NEW_PAD_CTRL(MX51_PAD_EIM_EB2__FEC_MDIO, PAD_CTL_HYS | - PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | - PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST), - MX51_PAD_NANDF_CS3__FEC_MDC, - NEW_PAD_CTRL(MX51_PAD_EIM_CS3__FEC_RDATA3, MX51_PAD_CTRL_2), - NEW_PAD_CTRL(MX51_PAD_EIM_CS2__FEC_RDATA2, MX51_PAD_CTRL_2), - NEW_PAD_CTRL(MX51_PAD_EIM_EB3__FEC_RDATA1, MX51_PAD_CTRL_2), - MX51_PAD_NANDF_D9__FEC_RDATA0, - MX51_PAD_NANDF_CS6__FEC_TDATA3, - MX51_PAD_NANDF_CS5__FEC_TDATA2, - MX51_PAD_NANDF_CS4__FEC_TDATA1, - MX51_PAD_NANDF_D8__FEC_TDATA0, - MX51_PAD_NANDF_CS7__FEC_TX_EN, - MX51_PAD_NANDF_CS2__FEC_TX_ER, - MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK, - NEW_PAD_CTRL(MX51_PAD_NANDF_RB2__FEC_COL, MX51_PAD_CTRL_4), - NEW_PAD_CTRL(MX51_PAD_NANDF_RB3__FEC_RX_CLK, MX51_PAD_CTRL_4), - MX51_PAD_EIM_CS5__FEC_CRS, - MX51_PAD_EIM_CS4__FEC_RX_ER, - NEW_PAD_CTRL(MX51_PAD_NANDF_D11__FEC_RX_DV, MX51_PAD_CTRL_4), - }; - - imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); -} - -#ifdef CONFIG_MXC_SPI -static void setup_iomux_spi(void) -{ - static const iomux_v3_cfg_t spi_pads[] = { - NEW_PAD_CTRL(MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, PAD_CTL_HYS | - PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_CSPI1_MISO__ECSPI1_MISO, PAD_CTL_HYS | - PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_CSPI1_SS1__ECSPI1_SS1, - MX51_GPIO_PAD_CTRL), - MX51_PAD_CSPI1_SS0__ECSPI1_SS0, - NEW_PAD_CTRL(MX51_PAD_CSPI1_RDY__ECSPI1_RDY, MX51_PAD_CTRL_2), - NEW_PAD_CTRL(MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, PAD_CTL_HYS | - PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST), - }; - - imx_iomux_v3_setup_multiple_pads(spi_pads, ARRAY_SIZE(spi_pads)); -} -#endif - -#ifdef CONFIG_USB_EHCI_MX5 -#define MX51EVK_USBH1_HUB_RST IMX_GPIO_NR(1, 7) -#define MX51EVK_USBH1_STP IMX_GPIO_NR(1, 27) -#define MX51EVK_USB_CLK_EN_B IMX_GPIO_NR(2, 1) -#define MX51EVK_USB_PHY_RESET IMX_GPIO_NR(2, 5) - -static void setup_usb_h1(void) -{ - static const iomux_v3_cfg_t usb_h1_pads[] = { - MX51_PAD_USBH1_CLK__USBH1_CLK, - MX51_PAD_USBH1_DIR__USBH1_DIR, - MX51_PAD_USBH1_STP__USBH1_STP, - MX51_PAD_USBH1_NXT__USBH1_NXT, - MX51_PAD_USBH1_DATA0__USBH1_DATA0, - MX51_PAD_USBH1_DATA1__USBH1_DATA1, - MX51_PAD_USBH1_DATA2__USBH1_DATA2, - MX51_PAD_USBH1_DATA3__USBH1_DATA3, - MX51_PAD_USBH1_DATA4__USBH1_DATA4, - MX51_PAD_USBH1_DATA5__USBH1_DATA5, - MX51_PAD_USBH1_DATA6__USBH1_DATA6, - MX51_PAD_USBH1_DATA7__USBH1_DATA7, - - NEW_PAD_CTRL(MX51_PAD_GPIO1_7__GPIO1_7, 0), /* H1 hub reset */ - MX51_PAD_EIM_D17__GPIO2_1, - MX51_PAD_EIM_D21__GPIO2_5, /* PHY reset */ - }; - - imx_iomux_v3_setup_multiple_pads(usb_h1_pads, ARRAY_SIZE(usb_h1_pads)); -} - -int board_ehci_hcd_init(int port) -{ - /* Set USBH1_STP to GPIO and toggle it */ - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_USBH1_STP__GPIO1_27, - MX51_USBH_PAD_CTRL)); - - gpio_direction_output(MX51EVK_USBH1_STP, 0); - gpio_direction_output(MX51EVK_USB_PHY_RESET, 0); - mdelay(10); - gpio_set_value(MX51EVK_USBH1_STP, 1); - - /* Set back USBH1_STP to be function */ - imx_iomux_v3_setup_pad(MX51_PAD_USBH1_STP__USBH1_STP); - - /* De-assert USB PHY RESETB */ - gpio_set_value(MX51EVK_USB_PHY_RESET, 1); - - /* Drive USB_CLK_EN_B line low */ - gpio_direction_output(MX51EVK_USB_CLK_EN_B, 0); - - /* Reset USB hub */ - gpio_direction_output(MX51EVK_USBH1_HUB_RST, 0); - mdelay(2); - gpio_set_value(MX51EVK_USBH1_HUB_RST, 1); - return 0; -} -#endif - -static void power_init(void) -{ - unsigned int val; - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; - struct pmic *p; - int ret; - - ret = pmic_init(CONFIG_FSL_PMIC_BUS); - if (ret) - return; - - p = pmic_get("FSL_PMIC"); - if (!p) - return; - - /* Write needed to Power Gate 2 register */ - pmic_reg_read(p, REG_POWER_MISC, &val); - val &= ~PWGT2SPIEN; - pmic_reg_write(p, REG_POWER_MISC, val); - - /* Externally powered */ - pmic_reg_read(p, REG_CHARGE, &val); - val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB; - pmic_reg_write(p, REG_CHARGE, val); - - /* power up the system first */ - pmic_reg_write(p, REG_POWER_MISC, PWUP); - - /* Set core voltage to 1.1V */ - pmic_reg_read(p, REG_SW_0, &val); - val = (val & ~SWx_VOLT_MASK) | SWx_1_100V; - pmic_reg_write(p, REG_SW_0, val); - - /* Setup VCC (SW2) to 1.25 */ - pmic_reg_read(p, REG_SW_1, &val); - val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; - pmic_reg_write(p, REG_SW_1, val); - - /* Setup 1V2_DIG1 (SW3) to 1.25 */ - pmic_reg_read(p, REG_SW_2, &val); - val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; - pmic_reg_write(p, REG_SW_2, val); - udelay(50); - - /* Raise the core frequency to 800MHz */ - writel(0x0, &mxc_ccm->cacrr); - - /* Set switchers in Auto in NORMAL mode & STANDBY mode */ - /* Setup the switcher mode for SW1 & SW2*/ - pmic_reg_read(p, REG_SW_4, &val); - val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | - (SWMODE_MASK << SWMODE2_SHIFT))); - val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | - (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); - pmic_reg_write(p, REG_SW_4, val); - - /* Setup the switcher mode for SW3 & SW4 */ - pmic_reg_read(p, REG_SW_5, &val); - val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) | - (SWMODE_MASK << SWMODE4_SHIFT))); - val |= (SWMODE_AUTO_AUTO << SWMODE3_SHIFT) | - (SWMODE_AUTO_AUTO << SWMODE4_SHIFT); - pmic_reg_write(p, REG_SW_5, val); - - /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */ - pmic_reg_read(p, REG_SETTING_0, &val); - val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK); - val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6; - pmic_reg_write(p, REG_SETTING_0, val); - - /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */ - pmic_reg_read(p, REG_SETTING_1, &val); - val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK); - val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775; - pmic_reg_write(p, REG_SETTING_1, val); - - /* Configure VGEN3 and VCAM regulators to use external PNP */ - val = VGEN3CONFIG | VCAMCONFIG; - pmic_reg_write(p, REG_MODE_1, val); - udelay(200); - - /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ - val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG | - VVIDEOEN | VAUDIOEN | VSDEN; - pmic_reg_write(p, REG_MODE_1, val); - - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_EIM_A20__GPIO2_14, - NO_PAD_CTRL)); - gpio_direction_output(IMX_GPIO_NR(2, 14), 0); - - udelay(500); - - gpio_set_value(IMX_GPIO_NR(2, 14), 1); -} - -#ifdef CONFIG_FSL_ESDHC_IMX -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret; - - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0, - NO_PAD_CTRL)); - gpio_direction_input(IMX_GPIO_NR(1, 0)); - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6, - NO_PAD_CTRL)); - gpio_direction_input(IMX_GPIO_NR(1, 6)); - - if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) - ret = !gpio_get_value(IMX_GPIO_NR(1, 0)); - else - ret = !gpio_get_value(IMX_GPIO_NR(1, 6)); - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - static const iomux_v3_cfg_t sd1_pads[] = { - NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX | - PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX | - PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX | - PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX | - PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX | - PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX | - PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS), - NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS), - }; - - static const iomux_v3_cfg_t sd2_pads[] = { - NEW_PAD_CTRL(MX51_PAD_SD2_CMD__SD2_CMD, - PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD2_CLK__SD2_CLK, - PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD2_DATA0__SD2_DATA0, - PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD2_DATA1__SD2_DATA1, - PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD2_DATA2__SD2_DATA2, - PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_SD2_DATA3__SD2_DATA3, - PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST), - NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6, PAD_CTL_HYS), - NEW_PAD_CTRL(MX51_PAD_GPIO1_5__GPIO1_5, PAD_CTL_HYS), - }; - - u32 index; - int ret; - - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - - for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; - index++) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads(sd1_pads, - ARRAY_SIZE(sd1_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads(sd2_pads, - ARRAY_SIZE(sd2_pads)); - break; - default: - printf("Warning: you configured more ESDHC controller" - "(%d) as supported by the board(2)\n", - CONFIG_SYS_FSL_ESDHC_NUM); - return -EINVAL; - } - ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]); - if (ret) - return ret; - } - return 0; -} -#endif - -int board_early_init_f(void) -{ - setup_iomux_uart(); - setup_iomux_fec(); -#ifdef CONFIG_USB_EHCI_MX5 - setup_usb_h1(); -#endif - setup_iomux_lcd(); - - return 0; -} - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - return 0; -} - -#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) -{ -#ifdef CONFIG_MXC_SPI - setup_iomux_spi(); - power_init(); -#endif - - return 0; -} -#endif - -/* - * Do not overwrite the console - * Use always serial for U-Boot console - */ -int overwrite_console(void) -{ - return 1; -} - -int checkboard(void) -{ - puts("Board: MX51EVK\n"); - - return 0; -} diff --git a/board/freescale/mx51evk/mx51evk_video.c b/board/freescale/mx51evk/mx51evk_video.c deleted file mode 100644 index 3715c5d738..0000000000 --- a/board/freescale/mx51evk/mx51evk_video.c +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Freescale Semiconductor, Inc. - * Fabio Estevam - */ - -#include -#include -#include -#include -#include -#include -#include - -#define MX51EVK_LCD_3V3 IMX_GPIO_NR(4, 9) -#define MX51EVK_LCD_5V IMX_GPIO_NR(4, 10) -#define MX51EVK_LCD_BACKLIGHT IMX_GPIO_NR(3, 4) - -static struct fb_videomode const claa_wvga = { - .name = "CLAA07LC0ACW", - .refresh = 57, - .xres = 800, - .yres = 480, - .pixclock = 37037, - .left_margin = 40, - .right_margin = 60, - .upper_margin = 10, - .lower_margin = 10, - .hsync_len = 20, - .vsync_len = 10, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode const dvi = { - .name = "DVI panel", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -void setup_iomux_lcd(void) -{ - /* DI2_PIN15 */ - imx_iomux_v3_setup_pad(MX51_PAD_DI_GP4__DI2_PIN15); - - /* Pad settings for DI2_DISP_CLK */ - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK, - PAD_CTL_PKE | PAD_CTL_DSE_MAX | PAD_CTL_SRE_SLOW)); - - /* Turn on 3.3V voltage for LCD */ - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_CSI2_D12__GPIO4_9, - NO_PAD_CTRL)); - gpio_direction_output(MX51EVK_LCD_3V3, 1); - - /* Turn on 5V voltage for LCD */ - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_CSI2_D13__GPIO4_10, - NO_PAD_CTRL)); - gpio_direction_output(MX51EVK_LCD_5V, 1); - - /* Turn on GPIO backlight */ - imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_DI1_D1_CS__GPIO3_4, - NO_PAD_CTRL)); - gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1); -} - -int board_video_skip(void) -{ - int ret; - char const *e = env_get("panel"); - - if (e) { - if (strcmp(e, "claa") == 0) { - ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565); - if (ret) - printf("claa cannot be configured: %d\n", ret); - return ret; - } - } - - /* - * 'panel' env variable not found or has different value than 'claa' - * Defaulting to dvi output. - */ - ret = ipuv3_fb_init(&dvi, 0, IPU_PIX_FMT_RGB24); - if (ret) - printf("dvi cannot be configured: %d\n", ret); - return ret; -} diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig deleted file mode 100644 index dbc4d85a22..0000000000 --- a/configs/mx51evk_defconfig +++ /dev/null @@ -1,42 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX5=y -CONFIG_SYS_TEXT_BASE=0x97800000 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0xC0000 -CONFIG_TARGET_MX51EVK=y -CONFIG_NR_DRAM_BANKS=1 -# CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg" -CONFIG_USE_PREBOOT=y -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_FUSE=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y -CONFIG_CMD_FAT=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_FSL_ESDHC_IMX=y -CONFIG_MTD=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_MXC_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_MX5=y -CONFIG_USB_STORAGE=y -CONFIG_USB_HOST_ETHER=y -CONFIG_USB_ETHER_ASIX=y -CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h deleted file mode 100644 index 182648a0f1..0000000000 --- a/include/configs/mx51evk.h +++ /dev/null @@ -1,197 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2007, Guennadi Liakhovetski - * - * (C) Copyright 2009 Freescale Semiconductor, Inc. - * - * Configuration settings for the MX51EVK Board - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - - /* High Level Configuration Options */ - -#define CONFIG_SYS_FSL_CLK - -#include - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -#define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) - -/* - * Hardware drivers - */ -#define CONFIG_FSL_IIM - -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE - -/* PMIC Controller */ -#define CONFIG_POWER -#define CONFIG_POWER_SPI -#define CONFIG_POWER_FSL -#define CONFIG_FSL_PMIC_BUS 0 -#define CONFIG_FSL_PMIC_CS 0 -#define CONFIG_FSL_PMIC_CLK 2500000 -#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC_BITLEN 32 -#define CONFIG_RTC_MC13XXX - -/* - * MMC Configs - * */ -#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_NUM 2 - -/* - * Eth Configs - */ - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE FEC_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 0x1F - -/* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI -#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED - -/* Framebuffer and LCD */ -#define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_SPLASH_SCREEN -#define CONFIG_BMP_16BPP -#define CONFIG_VIDEO_LOGO - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_ETHPRIME "FEC0" - -#define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "fdt_file=imx51-babbage.dtb\0" \ - "fdt_addr=0x91000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "mmcdev=0\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo ERROR: Cannot load the DT; " \ - "exit; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - -#define CONFIG_ARP_TIMEOUT 200UL - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define PHYS_SDRAM_1 CSD0_BASE_ADDR -#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) - -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -#define CONFIG_SYS_DDR_CLKSEL 0 -#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 -#define CONFIG_SYS_MAIN_PWR_ON - -/*----------------------------------------------------------------------- - * environment organization - */ - -/* - * Environment starts at CONFIG_ENV_OFFSET=0xC0000 = 768k = 768 * 1024 = 786432 - * - * Detect overlap between U-Boot image and environment area in build-time - * - * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset - * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408 - * - * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so - * write the direct value here - */ -#define CONFIG_BOARD_SIZE_LIMIT 785408 -#define CONFIG_SYS_MMC_ENV_DEV 0 - -#endif