[v1,12/43] x86: Add bindings for NHLT

Message ID	20200615035738.248710-9-sjg@chromium.org
State	Accepted
Commit	70303d24809599e14f97f8ef08364ac6589410f4
Headers	show List-Id: U-Boot discussion <u-boot.lists.denx.de> From: sjg at chromium.org (Simon Glass) Date: Sun, 14 Jun 2020 21:57:07 -0600 Subject: [PATCH v1 12/43] x86: Add bindings for NHLT In-Reply-To: <20200615035738.248710-1-sjg@chromium.org> References: <20200615035738.248710-1-sjg@chromium.org> Message-ID: <20200615035738.248710-9-sjg@chromium.org>
Series	x86: Programmatic generation of ACPI tables (Part C) \| expand [v1,00/43] x86: Programmatic generation of ACPI tables (Part C) [v1,01/43] binman: Allow setting the ROM offset [v1,02/43] binman: Refactor binman_entry_find() to allow other nodes [v1,03/43] binman: Add way to locate an entry in memory [v1,04/43] acpi: Allow creating the GNVS to fail [v1,05/43] dtoc: Support ACPI paths in of-platdata [v1,06/43] dm: core: Add a way of overriding the ACPI device path [v1,07/43] dm: acpi: Add support for the NHLT table [v1,08/43] acpi: Export functions to write sized values [v1,09/43] acpi: Support generation of a scope [v1,10/43] acpi: Support generation of a generic register [v1,11/43] acpi: mmc: Generate ACPI info for the PCI SD Card [v1,12/43] x86: Add bindings for NHLT [v1,13/43] acpi: Support generation of a device [v1,14/43] acpi: Support writing named values [v1,15/43] sound: Add an ACPI driver for Dialog Semicondutor da7219 [v1,16/43] sound: Add an ACPI driver for Maxim MAX98357ac [v1,17/43] x86: pinctrl: Add a way to get the pinctrl reg address [v1,18/43] x86: pinctrl: Update comment for intel_pinctrl_get_pad() [v1,19/43] x86: pinctrl: Add multi-ACPI control [v1,20/43] x86: pinctrl: Set up itss in the probe() method [v1,21/43] x86: pinctrl: Drop the acpi_name member [v1,22/43] x86: Add support for building up an NHLT structure [v1,23/43] x86: Add error checking for csrt table generation [v1,24/43] x86: apl: Use memory-mapped access for VBT [v1,25/43] x86: gpio: Add support for obtaining ACPI info for a GPIO [v1,26/43] i2c: designware_i2c: Add a little more debugging [v1,27/43] i2c: Add log_ret() on error [v1,28/43] i2c: designware_i2c: Support ACPI table generation [v1,29/43] p2sb: Add a method to hide the bus [v1,30/43] x86: apl: Support set_hide() in p2sb driver [v1,31/43] x86: apl: Hide the p2sb on exit from U-Boot [v1,32/43] pmc: Move common registers to the header file [v1,33/43] x86: irq: Support flags for acpi_gpe [v1,34/43] x86: apl: Fix save/restore of ITSS priorities [v1,35/43] x86: Add debugging to table writing [v1,36/43] x86: apl: Adjust FSP-M code to avoid hard-coded address [v1,37/43] x86: Store the coreboot table address in global_data [v1,38/43] x86: mp: Allow use of mp_run_on_cpus() without MP [v1,39/43] x86: Update the comment about booting for FSP2 [v1,40/43] x86: Drop setup_pcat_compatibility() [v1,41/43] x86: acpi: Correct the version of the MADT [v1,42/43] x86: Rename board_final_cleanup() to board_final_init() [v1,43/43] acpi: Enable ACPI table generation by default on x86

Message ID

20200615035738.248710-9-sjg@chromium.org

State

Accepted

Commit

70303d24809599e14f97f8ef08364ac6589410f4

Headers

List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: sjg at chromium.org (Simon Glass)
Date: Sun, 14 Jun 2020 21:57:07 -0600
Subject: [PATCH v1 12/43] x86: Add bindings for NHLT
In-Reply-To: <20200615035738.248710-1-sjg@chromium.org>
References: <20200615035738.248710-1-sjg@chromium.org>
Message-ID: <20200615035738.248710-9-sjg@chromium.org>

Series

x86: Programmatic generation of ACPI tables (Part C) | expand

Commit Message

Simon Glass June 15, 2020, 3:57 a.m. UTC

Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
(NHLT).

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 include/dt-bindings/sound/nhlt.h | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 include/dt-bindings/sound/nhlt.h

Comments

Wolfgang Wallner June 25, 2020, 1:36 p.m. UTC | #1

Hi Simon,

-----"Simon Glass" <sjg at chromium.org> schrieb: -----
> Betreff: [PATCH v1 12/43] x86: Add bindings for NHLT
> 
> Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
> (NHLT).
> 
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
> 
>  include/dt-bindings/sound/nhlt.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>  create mode 100644 include/dt-bindings/sound/nhlt.h
> 
> diff --git a/include/dt-bindings/sound/nhlt.h b/include/dt-bindings/sound/nhlt.h
> new file mode 100644
> index 0000000000..c33f874966
> --- /dev/null
> +++ b/include/dt-bindings/sound/nhlt.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright 2019 Google LLC
> + */
> +
> +#ifndef _DT_BINDINGS_SOUND_NHLT_H
> +#define _DT_BINDINGS_SOUND_NHLT_H
> +

Nit: I like to know where numeric constants come from, so I would propose to
add a comment like the following:

/* See Table 2-1. NHLT Endpoint Descriptor in the NHLT Specification (0.8.1) */
> +#define NHLT_VID	0x8086
> +#define NHLT_DID_DMIC	0xae20
> +#define NHLT_DID_BT	0xae30
> +#define NHLT_DID_SSP	0xae34
> +
> +/* Hardware links available to use for codecs */
> +#define AUDIO_LINK_SSP0		0
> +#define AUDIO_LINK_SSP1		1
> +#define AUDIO_LINK_SSP2		2
> +#define AUDIO_LINK_SSP3		3
> +#define AUDIO_LINK_SSP4		4
> +#define AUDIO_LINK_SSP5		5
> +#define AUDIO_LINK_DMIC		6
> +
> +#endif /* _DT_BINDINGS_SOUND_NHLT_H */
> -- 
> 2.27.0.290.gba653c62da-goog

Reviewed-by: Wolfgang Wallner <wolfgang.wallner at br-automation.com>

Bin Meng June 30, 2020, 5:57 a.m. UTC | #2

Hi Simon,

On Mon, Jun 15, 2020 at 11:57 AM Simon Glass <sjg at chromium.org> wrote:
>
> Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
> (NHLT).
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  include/dt-bindings/sound/nhlt.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>  create mode 100644 include/dt-bindings/sound/nhlt.h
>
> diff --git a/include/dt-bindings/sound/nhlt.h b/include/dt-bindings/sound/nhlt.h
> new file mode 100644
> index 0000000000..c33f874966
> --- /dev/null
> +++ b/include/dt-bindings/sound/nhlt.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright 2019 Google LLC
> + */
> +
> +#ifndef _DT_BINDINGS_SOUND_NHLT_H
> +#define _DT_BINDINGS_SOUND_NHLT_H
> +
> +#define NHLT_VID       0x8086
> +#define NHLT_DID_DMIC  0xae20
> +#define NHLT_DID_BT    0xae30
> +#define NHLT_DID_SSP   0xae34

These look like PCI vendor ID (0x8086 for Intel) and device IDs. If
they are device IDs, how could they be fixed?

> +
> +/* Hardware links available to use for codecs */
> +#define AUDIO_LINK_SSP0                0
> +#define AUDIO_LINK_SSP1                1
> +#define AUDIO_LINK_SSP2                2
> +#define AUDIO_LINK_SSP3                3
> +#define AUDIO_LINK_SSP4                4
> +#define AUDIO_LINK_SSP5                5
> +#define AUDIO_LINK_DMIC                6
> +
> +#endif /* _DT_BINDINGS_SOUND_NHLT_H */
> --

Regards,
Bin

diff --git a/include/dt-bindings/sound/nhlt.h b/include/dt-bindings/sound/nhlt.h
new file mode 100644
index 0000000000..c33f874966
--- /dev/null
+++ b/include/dt-bindings/sound/nhlt.h
@@ -0,0 +1,23 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef _DT_BINDINGS_SOUND_NHLT_H
+#define _DT_BINDINGS_SOUND_NHLT_H
+
+#define NHLT_VID	0x8086
+#define NHLT_DID_DMIC	0xae20
+#define NHLT_DID_BT	0xae30
+#define NHLT_DID_SSP	0xae34
+
+/* Hardware links available to use for codecs */
+#define AUDIO_LINK_SSP0		0
+#define AUDIO_LINK_SSP1		1
+#define AUDIO_LINK_SSP2		2
+#define AUDIO_LINK_SSP3		3
+#define AUDIO_LINK_SSP4		4
+#define AUDIO_LINK_SSP5		5
+#define AUDIO_LINK_DMIC		6
+
+#endif /* _DT_BINDINGS_SOUND_NHLT_H */

[v1,12/43] x86: Add bindings for NHLT

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