From patchwork Mon Jun 22 06:55:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 242739 List-Id: U-Boot discussion From: vigneshr at ti.com (Vignesh Raghavendra) Date: Mon, 22 Jun 2020 12:25:55 +0530 Subject: [PATCH 3/3] arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT In-Reply-To: <20200622065555.16639-1-vigneshr@ti.com> References: <20200622065555.16639-1-vigneshr@ti.com> Message-ID: <20200622065555.16639-4-vigneshr@ti.com> Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi files. Signed-off-by: Vignesh Raghavendra --- arch/arm/dts/k3-am65-mcu.dtsi | 44 +++++++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++---------------- .../k3-j721e-common-proc-board-u-boot.dtsi | 118 ++--------------- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 43 +++++++ include/dt-bindings/dma/k3-udma.h | 31 ----- 5 files changed, 112 insertions(+), 245 deletions(-) delete mode 100644 include/dt-bindings/dma/k3-udma.h diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi index bc9a87210d..d1a9fb5de6 100644 --- a/arch/arm/dts/k3-am65-mcu.dtsi +++ b/arch/arm/dts/k3-am65-mcu.dtsi @@ -102,4 +102,48 @@ #size-cells = <0>; }; }; + + mcu_navss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <119>; + + mcu_ringacc: ringacc at 2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ + ti,dma-ring-reset-quirk; + ti,sci = <&dmsc>; + ti,sci-dev-id = <195>; + }; + + mcu_udmap: dma-controller at 285c0000 { + compatible = "ti,am654-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <194>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ + <0x2>; /* TX_CHAN */ + ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ + <0x4>; /* RX_CHAN */ + ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ + }; + }; }; diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index a7e5eb0553..1a40fa12b7 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -4,7 +4,6 @@ */ #include -#include #include / { @@ -47,51 +46,14 @@ &cbass_mcu { u-boot,dm-spl; - navss_mcu: navss-mcu { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + mcu_navss { u-boot,dm-spl; - ti,sci-dev-id = <119>; - - mcu_ringacc: ringacc at 2b800000 { - compatible = "ti,am654-navss-ringacc"; - reg = <0x0 0x2b800000 0x0 0x400000>, - <0x0 0x2b000000 0x0 0x400000>, - <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", - "proxy_gcfg", "proxy_target"; - ti,num-rings = <286>; - ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ - ti,dma-ring-reset-quirk; - ti,sci = <&dmsc>; - ti,sci-dev-id = <195>; + ringacc at 2b800000 { u-boot,dm-spl; }; - mcu_udmap: udmap at 285c0000 { - compatible = "ti,k3-navss-udmap"; - reg = <0x0 0x285c0000 0x0 0x100>, - <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names = "gcfg", "rchanrt", "tchanrt"; - #dma-cells = <3>; - - ti,ringacc = <&mcu_ringacc>; - ti,psil-base = <0x6000>; - - ti,sci = <&dmsc>; - ti,sci-dev-id = <194>; - - ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ - <0x2>; /* TX_CHAN */ - ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ - <0x4>; /* RX_CHAN */ - ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ - dma-coherent; + dma-controller at 285c0000 { u-boot,dm-spl; }; }; @@ -112,17 +74,16 @@ clocks = <&k3_clks 5 10>; clock-names = "fck"; power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>; - ti,psil-base = <0x7000>; - - dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>; + + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; @@ -148,62 +109,6 @@ #size-cells = <0>; bus_freq = <1000000>; }; - - ti,psil-config0 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config1 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config2 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config3 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config4 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config5 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config6 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config7 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; }; }; diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 7b01e4204f..6273133303 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -3,7 +3,6 @@ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ */ -#include #include / { @@ -46,50 +45,14 @@ }; }; - cbass_mcu_navss: mcu_navss { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - dma-coherent; - dma-ranges; - ranges; - - ti,sci-dev-id = <232>; + mcu_navss { u-boot,dm-spl; - mcu_ringacc: ringacc at 2b800000 { - compatible = "ti,am654-navss-ringacc"; - reg = <0x0 0x2b800000 0x0 0x400000>, - <0x0 0x2b000000 0x0 0x400000>, - <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; - ti,num-rings = <286>; - ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ - ti,sci = <&dmsc>; - ti,sci-dev-id = <235>; + ringacc at 2b800000 { u-boot,dm-spl; }; - mcu_udmap: udmap at 31150000 { - compatible = "ti,j721e-navss-mcu-udmap"; - reg = <0x0 0x285c0000 0x0 0x100>, - <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names = "gcfg", "rchanrt", "tchanrt"; - #dma-cells = <3>; - - ti,ringacc = <&mcu_ringacc>; - ti,psil-base = <0x6000>; - - ti,sci = <&dmsc>; - ti,sci-dev-id = <236>; - - ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ - <0x0f>; /* TX_HCHAN */ - ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ - <0x0b>; /* RX_HCHAN */ - ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ + dma-controller at 285c0000 { u-boot,dm-spl; }; }; @@ -105,18 +68,17 @@ clocks = <&k3_clks 18 22>; clock-names = "fck"; power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>; - ti,psil-base = <0x7000>; cpsw-phy-sel = <&phy_sel>; - dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>; + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; @@ -152,62 +114,6 @@ ti,cpts-ext-ts-inputs = <4>; ti,cpts-periodic-outputs = <2>; }; - - ti,psil-config0 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config1 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config2 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config3 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config4 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config5 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config6 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config7 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; }; }; diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index 2eed50aa5a..70d5bcaa72 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -199,4 +199,47 @@ clocks = <&k3_clks 195 0>; power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>; }; + + mcu_navss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <232>; + + mcu_ringacc: ringacc at 2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ + ti,sci = <&dmsc>; + ti,sci-dev-id = <235>; + }; + + mcu_udmap: dma-controller at 285c0000 { + compatible = "ti,j721e-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <236>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ + <0x0f>; /* TX_HCHAN */ + ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ + <0x0b>; /* RX_HCHAN */ + ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ + }; + }; }; diff --git a/include/dt-bindings/dma/k3-udma.h b/include/dt-bindings/dma/k3-udma.h deleted file mode 100644 index 670e1232b4..0000000000 --- a/include/dt-bindings/dma/k3-udma.h +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com - */ - -#ifndef __DT_TI_UDMA_H -#define __DT_TI_UDMA_H - -#define UDMA_TR_MODE 0 -#define UDMA_PKT_MODE 1 - -#define UDMA_DIR_TX 0 -#define UDMA_DIR_RX 1 - -#define PSIL_STATIC_TR_NONE 0 -#define PSIL_STATIC_TR_XY 1 -#define PSIL_STATIC_TR_MCAN 2 - -#define UDMA_PDMA_TR_XY(id) \ - ti,psil-config##id { \ - linux,udma-mode = ; \ - statictr-type = ; \ - } - -#define UDMA_PDMA_PKT_XY(id) \ - ti,psil-config##id { \ - linux,udma-mode = ; \ - statictr-type = ; \ - } - -#endif /* __DT_TI_UDMA_H */