From patchwork Mon Jun 22 13:17:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Kochetkov X-Patchwork-Id: 242750 List-Id: U-Boot discussion From: al.kochet at gmail.com (Alexander Kochetkov) Date: Mon, 22 Jun 2020 16:17:09 +0300 Subject: [PATCH 1/2] rockchip: clk: rk3188: change APLL to safe 600MHz In-Reply-To: <20200622131710.31168-1-al.kochet@gmail.com> References: <20200622131710.31168-1-al.kochet@gmail.com> Message-ID: <20200622131710.31168-2-al.kochet@gmail.com> The commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver") changed ARM clock from 600MHz to 1600MHz. It made boot unstable due to the fact that PMIC at the start generates insufficient voltage for operation. See also: commit f4f57c58b589 ("rockchip: rk3188: Setup the armclk in spl"). Fixes commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver"). Signed-off-by: Alexander Kochetkov Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3188.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index b193ac913e..4fc5c78563 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -564,7 +564,8 @@ static int rk3188_clk_probe(struct udevice *dev) rkclk_init(priv->cru, priv->grf, priv->has_bwadj); /* Init CPU frequency */ - rkclk_configure_cpu(priv->cru, priv->grf, APLL_HZ, priv->has_bwadj); + rkclk_configure_cpu(priv->cru, priv->grf, APLL_SAFE_HZ, + priv->has_bwadj); #endif return 0;