From patchwork Tue Jun 23 09:51:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 242798 List-Id: U-Boot discussion From: sr at denx.de (Stefan Roese) Date: Tue, 23 Jun 2020 11:51:41 +0200 Subject: [PATCH v1 5/5] mips: octeon: Add empty invalidate_dcache_range() In-Reply-To: <20200623095141.3310591-1-sr@denx.de> References: <20200623095141.3310591-1-sr@denx.de> Message-ID: <20200623095141.3310591-6-sr@denx.de> As Octeon is cache coherent, lets add an empty version of invalidate_dcache_range(). With this, all global cache functions are replaced by no-ops on Octeon. Signed-off-by: Stefan Roese --- arch/mips/mach-octeon/cache.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/mips/mach-octeon/cache.c b/arch/mips/mach-octeon/cache.c index bea846d757..9a88bb97c7 100644 --- a/arch/mips/mach-octeon/cache.c +++ b/arch/mips/mach-octeon/cache.c @@ -18,3 +18,7 @@ void flush_dcache_range(ulong start_addr, ulong stop) void flush_cache(ulong start_addr, ulong size) { } + +void invalidate_dcache_range(ulong start_addr, ulong stop) +{ +}