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[2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id c12si9961800edx.604.2021.11.04.07.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Nov 2021 07:25:56 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e5Zya2WT; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 099838371C; Thu, 4 Nov 2021 15:24:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="e5Zya2WT"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BE2E3836F2; Thu, 4 Nov 2021 15:23:51 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7941B836DD for ; Thu, 4 Nov 2021 15:23:38 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=etienne.carriere@linaro.org Received: by mail-wm1-x32f.google.com with SMTP id g191-20020a1c9dc8000000b0032fbf912885so4403647wme.4 for ; Thu, 04 Nov 2021 07:23:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=p+ftTxl5c9r9quUZMgS5i4SPSYsKmoro2+VlePlRmxM=; b=e5Zya2WT/xmOe438BS72BYKnlstKtlYJEVMiHE/ODFUiwKK1f8HX7etCc9rMWGyLx8 uBLXAKhkuPMkv4Hcc6Rl3TfT3zChJuqUyiLKhqqpfTw2BR3Ss/yl6xc0Y/OUxa7yT2xO E1P78+VSuuaGU7Mc/UhfYOOfIJShaCmytmkI5BxDQ+Aa0MOLH0X0icSzDgd3NKwgMZnv okF1DOyDqkh9Nqqc4Yim4D/cBEheozytl8CFV8LbsnDcTVKO6XuP4EfN1Jomgy/arRIl udvFf5VhkEL83vAz/jtM6gqpui/5qSC4t9vZfhZVsTltVUsdPYmgimWSllPWd446axtn Z7qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=p+ftTxl5c9r9quUZMgS5i4SPSYsKmoro2+VlePlRmxM=; b=qeQKpyB/MT6aAcwxFWdLNTyJEtW8wsjIe2osBFZxHsNA7uB5G2lbatpv/kDA2gXZUV xpXePaWqJvW3qg6j2ZQwqKTc8p/aoYZi3Q4GkfpuweafITfprKyb+XKgdEDVOkvWUnsY Ns3s2no/MK9hpek8P3RgkEYL+W8hawOL2x/GNkRWD5uenz+hxH03jsqMfNqw1StuJXrz 4HnhcloAp9ZpwwQ+FaBpZjJOVVZ4mnbujApiIUIhalK8/G55OLciWGc3jCIIxos7/MDg DyZoNdguvJhUETfvDa68RJXtMwZKTlv4r5gkHLArjoqvzoSc4hLEgUdr70yjuUvwUO9E Pdlw== X-Gm-Message-State: AOAM533oc8ITluKZSi89+0PelA8s+/JGlrcoK9zp+pwfa+tqG6/Hfo6A vyFSGeQTgTz7BmcdAerjiRU02+DyDplHcg== X-Received: by 2002:a05:600c:364f:: with SMTP id y15mr22509536wmq.7.1636035817649; Thu, 04 Nov 2021 07:23:37 -0700 (PDT) Received: from lmecxl0524.lme.st.com ([2a04:cec0:10b3:52ee:40ee:3a6f:5eb8:bd35]) by smtp.gmail.com with ESMTPSA id m34sm9383297wms.25.2021.11.04.07.23.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Nov 2021 07:23:37 -0700 (PDT) From: Etienne Carriere To: u-boot@lists.denx.de Cc: Etienne Carriere , Etienne Carriere Subject: [PATCH 12/14] [HACK] mailbox: add new arm smc/hvc mailbox Date: Thu, 4 Nov 2021 15:23:22 +0100 Message-Id: <20211104142324.2879-12-etienne.carriere@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211104142324.2879-1-etienne.carriere@linaro.org> References: <20211104142324.2879-1-etienne.carriere@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Etienne Carriere Basic mailbox inspired from https://patchwork.kernel.org/patch/11166071/. When sending a message, the mailbox invokes the Cortex-A Arm Trustzone secure monitor with an SMC or HVC instruction providing a function identifier in register R0/X0 defined by the DTB. Signed-off-by: Etienne Carriere Signed-off-by: Etienne Carriere --- drivers/mailbox/Kconfig | 8 +++ drivers/mailbox/Makefile | 1 + drivers/mailbox/arm-smc-mbox.c | 123 +++++++++++++++++++++++++++++++++ 3 files changed, 132 insertions(+) create mode 100644 drivers/mailbox/arm-smc-mbox.c -- 2.17.1 diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index dd4b0ac0c3..599d1df1ae 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -47,4 +47,12 @@ config ZYNQMP_IPI help This enables support for the Xilinx ZynqMP Inter Processor Interrupt communication controller. + +config ARM_SMC_MAILBOX + bool "Enable Arm SMC mailbox support" + depends on DM_MAILBOX && ARM_SMCCC + default y + help + Mailbox notification through an Arm SMC or HVC calls. + endmenu diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index d2ace8cd21..7a56a454b8 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile @@ -3,6 +3,7 @@ # Copyright (c) 2016, NVIDIA CORPORATION. # +obj-$(CONFIG_ARM_SMC_MAILBOX) += arm-smc-mbox.o obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox-uclass.o obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox.o obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox-test.o diff --git a/drivers/mailbox/arm-smc-mbox.c b/drivers/mailbox/arm-smc-mbox.c new file mode 100644 index 0000000000..d379da490a --- /dev/null +++ b/drivers/mailbox/arm-smc-mbox.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019, Linaro Limited + */ + +#define LOG_CATEGORY UCLASS_MAILBOX + +#include +#include +#include +#include +#include +#include +#include + +#define ARM_SMC_METHOD 0 +#define ARM_HVC_METHOD 1 + +typedef void (invoke_fn_t)(unsigned long); + +struct smc_pdata { + unsigned long func_id; + invoke_fn_t *invoke_fn; +}; + +/* Simple wrapper functions to be able to use a function pointer */ +static void smccc_smc(unsigned long a0) +{ + struct arm_smccc_res res; + + arm_smccc_smc(a0, 0, 0, 0, 0, 0, 0, 0, &res); +} + +static void smccc_hvc(unsigned long a0) +{ + struct arm_smccc_res res; + + arm_smccc_hvc(a0, 0, 0, 0, 0, 0, 0, 0, &res); +} + +static int smc_mbox_send(struct mbox_chan *chan, const void *data) +{ + struct smc_pdata *pdata = dev_get_plat(chan->dev); + + /* + * This mailbox invokes secure world for a channel event. + * Message is already in the channel's shared memory. + */ + pdata->invoke_fn(pdata->func_id); + + return 0; +} + +static int smc_mbox_recv(struct mbox_chan *chan, void *data) +{ + /* Mbox owner already got the return message from shared memory */ + return 0; +} + +static int smc_mbox_request(struct mbox_chan *chan) +{ + return 0; +} + +static int smc_mbox_rfree(struct mbox_chan *chan) +{ + return 0; +} + +static int smc_mbox_of_xlate(struct mbox_chan *chan, + struct ofnode_phandle_args *args) +{ + if (args->args_count) + dev_warn(chan->dev, "Expect no argument to smc-mbox cells\n"); + + chan->id = 0; + + return 0; +} + +static int smc_mbox_ofdata_to_platdata(struct udevice *dev) +{ + ulong compat_data = dev_get_driver_data(dev); + struct smc_pdata *pdata = dev_get_plat(dev); + u32 func_id; + + if (dev_read_u32(dev, "arm,func-id", &func_id)) { + dev_err(dev, "Missing property arm,func-id\n"); + return -EINVAL; + } + + pdata->func_id = func_id; + + if (compat_data == ARM_SMC_METHOD) + pdata->invoke_fn = smccc_smc; + else + pdata->invoke_fn = smccc_hvc; + + return 0; +} + +static const struct udevice_id smc_mbox_ids[] = { + { .compatible = "arm,smc-mbox", .data = ARM_SMC_METHOD, }, + { .compatible = "arm,hvc-mbox", .data = ARM_HVC_METHOD, }, + { } +}; + +struct mbox_ops smc_mbox_ops = { + .of_xlate = smc_mbox_of_xlate, + .request = smc_mbox_request, + .rfree = smc_mbox_rfree, + .send = smc_mbox_send, + .recv = smc_mbox_recv, +}; + +U_BOOT_DRIVER(smc_mbox) = { + .name = "arm_smc_mbox", + .id = UCLASS_MAILBOX, + .of_match = smc_mbox_ids, + .of_to_plat = smc_mbox_ofdata_to_platdata, + .plat_auto = sizeof(struct smc_pdata), + .ops = &smc_mbox_ops, +};