diff mbox series

[v2,04/10] mtd: nand: brcmnand: Add support for flash-dma v0

Message ID 20230211152909.1436133-5-linus.walleij@linaro.org
State New
Headers show
Series Backport BRCMNAND changes from Linux | expand

Commit Message

Linus Walleij Feb. 11, 2023, 3:29 p.m. UTC
From: Kamal Dasu <kdasu.kdev@gmail.com>

This change adds support for flash dma v0.0.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/mtd/nand/raw/brcmnand/brcmnand.c | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

Comments

William Zhang Feb. 22, 2023, 1:13 a.m. UTC | #1
On 02/11/2023 07:29 AM, Linus Walleij wrote:
> From: Kamal Dasu <kdasu.kdev@gmail.com>
> 
> This change adds support for flash dma v0.0.
> 
> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> [Ported to U-Boot from the Linux kernel]
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>   drivers/mtd/nand/raw/brcmnand/brcmnand.c | 21 +++++++++++++++++++--
>   1 file changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> index 0402cb06a74b..a934373a2992 100644
> --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> @@ -120,6 +120,18 @@ enum flash_dma_reg {
>   };
>   
>   #ifndef __UBOOT__
> +/* flash_dma registers v0*/
> +static const u16 flash_dma_regs_v0[] = {
> +	[FLASH_DMA_REVISION]		= 0x00,
> +	[FLASH_DMA_FIRST_DESC]		= 0x04,
> +	[FLASH_DMA_CTRL]		= 0x08,
> +	[FLASH_DMA_MODE]		= 0x0c,
> +	[FLASH_DMA_STATUS]		= 0x10,
> +	[FLASH_DMA_INTERRUPT_DESC]	= 0x14,
> +	[FLASH_DMA_ERROR_STATUS]	= 0x18,
> +	[FLASH_DMA_CURRENT_DESC]	= 0x1c,
> +};
> +
>   /* flash_dma registers v1*/
>   static const u16 flash_dma_regs_v1[] = {
>   	[FLASH_DMA_REVISION]		= 0x00,
> @@ -614,6 +626,8 @@ static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl)
>   	/* flash_dma register offsets */
>   	if (ctrl->nand_version >= 0x0703)
>   		ctrl->flash_dma_offsets = flash_dma_regs_v4;
> +	else if (ctrl->nand_version == 0x0602)
> +		ctrl->flash_dma_offsets = flash_dma_regs_v0;
>   	else
>   		ctrl->flash_dma_offsets = flash_dma_regs_v1;
>   }
> @@ -1645,8 +1659,11 @@ static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc)
>   
>   	flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
>   	(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
> -	flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
> -	(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
> +	if (ctrl->nand_version > 0x0602) {
> +		flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT,
> +				 upper_32_bits(desc));
> +		(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
> +	}
>   
>   	/* Start FLASH_DMA engine */
>   	ctrl->dma_pending = true;
> 

Acked-by: William Zhang <william.zhang@broadcom.com>
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 0402cb06a74b..a934373a2992 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -120,6 +120,18 @@  enum flash_dma_reg {
 };
 
 #ifndef __UBOOT__
+/* flash_dma registers v0*/
+static const u16 flash_dma_regs_v0[] = {
+	[FLASH_DMA_REVISION]		= 0x00,
+	[FLASH_DMA_FIRST_DESC]		= 0x04,
+	[FLASH_DMA_CTRL]		= 0x08,
+	[FLASH_DMA_MODE]		= 0x0c,
+	[FLASH_DMA_STATUS]		= 0x10,
+	[FLASH_DMA_INTERRUPT_DESC]	= 0x14,
+	[FLASH_DMA_ERROR_STATUS]	= 0x18,
+	[FLASH_DMA_CURRENT_DESC]	= 0x1c,
+};
+
 /* flash_dma registers v1*/
 static const u16 flash_dma_regs_v1[] = {
 	[FLASH_DMA_REVISION]		= 0x00,
@@ -614,6 +626,8 @@  static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl)
 	/* flash_dma register offsets */
 	if (ctrl->nand_version >= 0x0703)
 		ctrl->flash_dma_offsets = flash_dma_regs_v4;
+	else if (ctrl->nand_version == 0x0602)
+		ctrl->flash_dma_offsets = flash_dma_regs_v0;
 	else
 		ctrl->flash_dma_offsets = flash_dma_regs_v1;
 }
@@ -1645,8 +1659,11 @@  static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc)
 
 	flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
 	(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
-	flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
-	(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+	if (ctrl->nand_version > 0x0602) {
+		flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT,
+				 upper_32_bits(desc));
+		(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+	}
 
 	/* Start FLASH_DMA engine */
 	ctrl->dma_pending = true;