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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id 23-20020ac24857000000b00492c663bba2sm711064lfy.124.2023.04.07.06.40.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Apr 2023 06:40:17 -0700 (PDT) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi , William Zhang Cc: Anand Gore , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Linus Walleij , Dario Binacchi Subject: [PATCH v4 1/5] nand: brcmnand: add iproc support Date: Fri, 7 Apr 2023 15:40:04 +0200 Message-Id: <20230407134008.1939717-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230407134008.1939717-1-linus.walleij@linaro.org> References: <20230407134008.1939717-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add support for the iproc Broadcom NAND controller, used in Northstar SoCs for example. Based on the Linux driver. Cc: Philippe Reynes Cc: Dario Binacchi Acked-by: William Zhang Reviewed-by: Michael Trimarchi Signed-off-by: Linus Walleij --- ChangeLog v3->v4: - No changes ChangeLog v2->v3: - Collect William Zhang's ACK - Bundle with NorthStar enablement patches. ChangeLog v1->v2: - Check return value of dev_read_resource() - Use devm_ioremap() - Collect Michael's Review tag --- drivers/mtd/nand/raw/Kconfig | 7 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/iproc_nand.c | 148 +++++++++++++++++++++ 3 files changed, 156 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/iproc_nand.c diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 5c7b0d9dcc1f..d115fcf841ff 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -156,6 +156,13 @@ config NAND_BRCMNAND_63158 help Enable support for broadcom nand driver on bcm63158. +config NAND_BRCMNAND_IPROC + bool "Support Broadcom NAND controller on the iproc family" + depends on NAND_BRCMNAND + help + Enable support for broadcom nand driver on the Broadcom + iproc family such as Northstar (BCM5301x, BCM4708...) + config NAND_DAVINCI bool "Support TI Davinci NAND controller" select SYS_NAND_SELF_INIT if TARGET_DA850EVM diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index f46a7edae321..0c6325aaa618 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -6,5 +6,6 @@ obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o +obj-$(CONFIG_NAND_BRCMNAND_IPROC) += iproc_nand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o diff --git a/drivers/mtd/nand/raw/brcmnand/iproc_nand.c b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c new file mode 100644 index 000000000000..69711d98ce1b --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Code borrowed from the Linux driver + * Copyright (C) 2015 Broadcom Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct iproc_nand_soc { + struct brcmnand_soc soc; + void __iomem *idm_base; + void __iomem *ext_base; +}; + +#define IPROC_NAND_CTLR_READY_OFFSET 0x10 +#define IPROC_NAND_CTLR_READY BIT(0) + +#define IPROC_NAND_IO_CTRL_OFFSET 0x00 +#define IPROC_NAND_APB_LE_MODE BIT(24) +#define IPROC_NAND_INT_CTRL_READ_ENABLE BIT(6) + +static bool iproc_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct iproc_nand_soc *priv = + container_of(soc, struct iproc_nand_soc, soc); + void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET; + u32 val = brcmnand_readl(mmio); + + if (val & IPROC_NAND_CTLR_READY) { + brcmnand_writel(IPROC_NAND_CTLR_READY, mmio); + return true; + } + + return false; +} + +static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct iproc_nand_soc *priv = + container_of(soc, struct iproc_nand_soc, soc); + void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; + u32 val = brcmnand_readl(mmio); + + if (en) + val |= IPROC_NAND_INT_CTRL_READ_ENABLE; + else + val &= ~IPROC_NAND_INT_CTRL_READ_ENABLE; + + brcmnand_writel(val, mmio); +} + +static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare, + bool is_param) +{ + struct iproc_nand_soc *priv = + container_of(soc, struct iproc_nand_soc, soc); + void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; + u32 val; + + val = brcmnand_readl(mmio); + + /* + * In the case of BE or when dealing with NAND data, always configure + * the APB bus to LE mode before accessing the FIFO and back to BE mode + * after the access is done + */ + if (IS_ENABLED(CONFIG_SYS_BIG_ENDIAN) || !is_param) { + if (prepare) + val |= IPROC_NAND_APB_LE_MODE; + else + val &= ~IPROC_NAND_APB_LE_MODE; + } else { /* when in LE accessing the parameter page, keep APB in BE */ + val &= ~IPROC_NAND_APB_LE_MODE; + } + + brcmnand_writel(val, mmio); +} + +static int iproc_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct iproc_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + int ret; + + soc = &priv->soc; + + ret = dev_read_resource_byname(pdev, "iproc-idm", &res); + if (ret) + return ret; + + priv->idm_base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->idm_base)) + return PTR_ERR(priv->idm_base); + + ret = dev_read_resource_byname(pdev, "iproc-ext", &res); + if (ret) + return ret; + + priv->ext_base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->ext_base)) + return PTR_ERR(priv->ext_base); + + soc->ctlrdy_ack = iproc_nand_intc_ack; + soc->ctlrdy_set_enabled = iproc_nand_intc_set; + soc->prepare_data_bus = iproc_nand_apb_access; + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id iproc_nand_dt_ids[] = { + { + .compatible = "brcm,nand-iproc", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(iproc_nand) = { + .name = "iproc-nand", + .id = UCLASS_MTD, + .of_match = iproc_nand_dt_ids, + .probe = iproc_nand_probe, + .priv_auto = sizeof(struct iproc_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(iproc_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +}