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[92.17.96.230]) by smtp.gmail.com with ESMTPSA id je17-20020a05600c1f9100b0040d1450ca7esm3429723wmb.7.2023.12.19.08.04.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 08:04:30 -0800 (PST) From: Caleb Connolly Date: Tue, 19 Dec 2023 16:04:09 +0000 Subject: [PATCH v2 08/32] gpio: qcom_pmic: 1-based GPIOs MIME-Version: 1.0 Message-Id: <20231219-b4-qcom-common-target-v2-8-b6dd9704219e@linaro.org> References: <20231219-b4-qcom-common-target-v2-0-b6dd9704219e@linaro.org> In-Reply-To: <20231219-b4-qcom-common-target-v2-0-b6dd9704219e@linaro.org> To: Neil Armstrong , Sumit Garg , Ramon Fried , Dzmitry Sankouski , Caleb Connolly , Peng Fan , Jaehoon Chung , Rayagonda Kokatanur , Lukasz Majewski , Sean Anderson , Jorge Ramirez-Ortiz , Stephan Gerhold Cc: Marek Vasut , u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=1467; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=GvAjrZ/Uf2N2sVruWVDuDSkRXKMBWWsBLOEXcDnB5gs=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtTG/Uxitnll4bNXmDTbr/GW0zpytizFYlnO/JCTEWFvz 1+v6DvUUcrCIMjBICumyCJ+Ypll09rL9hrbF1yAmcPKBDKEgYtTACbiv5jhf33R9qWKl/g3LDnW Er9LWafoh0r3ul9ZTi0/j0r/S1RU2gJUseDO1bn5X00dnE+Ul+67eO65SMfv5C1zG6O2v5tr4dc xBQA= X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Qualcomm PMICs number their GPIOs starting from 1, implement a custom .xlate method to handle this. Signed-off-by: Caleb Connolly Reviewed-by: Neil Armstrong --- drivers/gpio/qcom_pmic_gpio.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 6167c8411678..2a4fef8d28cb 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -209,12 +209,34 @@ static int qcom_gpio_set_value(struct udevice *dev, unsigned offset, REG_CTL_OUTPUT_MASK, !!value); } +static int qcom_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, + struct ofnode_phandle_args *args) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + if (args->args_count < 1) + return -EINVAL; + + /* GPIOs in DT are 1-based */ + desc->offset = args->args[0] - 1; + if (desc->offset >= uc_priv->gpio_count) + return -EINVAL; + + if (args->args_count < 2) + return 0; + + desc->flags = gpio_flags_xlate(args->args[1]); + + return 0; +} + static const struct dm_gpio_ops qcom_gpio_ops = { .direction_input = qcom_gpio_direction_input, .direction_output = qcom_gpio_direction_output, .get_value = qcom_gpio_get_value, .set_value = qcom_gpio_set_value, .get_function = qcom_gpio_get_function, + .xlate = qcom_gpio_xlate, }; static int qcom_gpio_probe(struct udevice *dev)